Mity CPU Platforms » MitySOM-5CSX Altera Cyclone V

Hi
We have an SD card connected to the MitySOM-5CSX the same way as on the evaluation platform with 4 data lines.
When running SD card read tests we have discovered that the read speed is only 6 MBytes/s, and that is not fast enough in our application:

dd if=/flash/tmp//testfile1.bin of=/dev/null bs=100M count=1 iflag=direct
:0+1 records in
0+1 records out
91093652 bytes (91 MB, 87 MiB) copied, 14.8141 s, 6.1 MB/s

cat /sys/kernel/debug/mmc0/ios shows:

clock:          50000000 Hz
vdd:            21 (3.3 ~ 3.4 V)
bus mode:       2 (push-pull)
chip select:    0 (don't care)
power mode:     2 (on)
bus width:      0 (1 bits)
timing spec:    2 (sd high-speed)
signal voltage: 0 (3.30 V)
driver type:    0 (driver type B)

The clock is as expected (50 MHz), but the bus-width used is 1 and not 4.

I have checked the socfpga_mitysom5csx_devkit.dts file which specifies 4 bits:

&mmc {
    status = "okay";
    num-slots = <1>;
    broken-cd;
    cap-mmc-highspeed;
    cap-sd-highspeed;
    vmmc-supply = <&regulator_3_3v>;
    vwmmc-supply= <&regulator_3_3v>;
    slot@0 {
        reg = <0>;
        bus-width = <4>;
    };
};

According to Cyclone V HPS "MMC Support matrix": https://www.intel.com/content/www/us/en/docs/programmable/683126/21-2/mmc-support-matrix.html 4 bit bus and 50MHz clock is supported, i.e. 25Mbytes/s.

Any suggestions on how to reach 25 MBytes/s read speed?
We are using the Rocko branch with kernel 4.9 RT.

BR
VJ