Mity CPU Platforms » MitySOM-AM57X

• Both schematics are using VUSB_VBUS1 as a net name. One of them is probably supposed to be VUSB_VBUS2.
• The SOM already contains 0.1uF caps on the USB1_SSTX_P/N lines, I don't believe they should be on the baseboard as well.
  
  This needs to be added to our datasheet.

1. For USB2, it is mentioned that voltage level is 1.8V. We need to connect these signals to USB3.0 StdA Connector

Can you point me to the documentation your referencing?

2. But for USB1 there is no voltage level mentioned (Module fixed-function pins (FF)).

As far as I'm aware, the USB_VBUS (pin 240 J1) pin is the only one with voltage level restrictions. And since both of your USB ports are host mode only, you shouldn't need to use the USB_VBUS pin (you should tie it to ground). You can connect all the USB datalines directly to the SOM like you've done in your schematic.

Reference: https://www.ti.com/lit/an/sprack7b/sprack7b.pdf?ts=1685999763358 Section 2.17

Hi Jonathan,

*1. For USB2, it is mentioned that voltage level is 1.8V. We need to connect these signals to USB3.0 StdA Connector

Can you point me to the documentation your referencing?*

https://www.criticallink.com/wp-content/uploads/60-000055-MitySOM-AM57_datasheet.pdf

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Thanks and regards
Sandeep S

Thanks, I'll look into it. I'm pretty sure that's incorrect.

The USB2_DM/DP supports 5V voltage level. Datasheet will be updated on next release.

Datasheet has been released