Mity CPU Platforms » MitySOM-A5

Brady,

Sounds like you're making the right change. I would just move your change into its own overlay so that you don't have to worry about a fresh DTB overriding your changes.

If you look at the kernel source for the DTS you are modifying you see it has the following node (socfpga_agilex5_mitysom_devkit.dts):

&i2c3 {
    status = "okay";

    fmc_mux_select_0: gpio@20 {
        compatible = "nxp,pcal6416";
        reg = <0x20>;
        vcc-supply = <&reg_baseboard_3v3>;
        gpio-controller;
        #gpio-cells = <2>;
        gpio-line-names = "FMC_SEL_LA06", "FMC_SEL_LA10",
                  "FMC_SEL_LA14", "FMC_SEL_LA18",
                  "FMC_SEL_LA26", "FMC_SEL_LA02",
                  "FMC_SEL_LA03", "FMC_SEL_LA08",
                  "FMC_SEL_LA27", "FMC_SEL_LA00_CC",
                  "FMC_SEL_LA01_CC", "FMC_SEL_LA05",
                  "FMC_SEL_LA09", "FMC_SEL_LA13",
                  "FMC_SEL_LA17", "FMC_SEL_LA23";
        status = "disabled";
    };
};

You noticed that the gpio@20 node is disabled. This is enabled in the FMC example overlay found here (socfpga_agilex5_mitysom_devkit_fmc.dtso):

/dts-v1/;
/plugin/;

#include "socfpga_agilex5_mity_a5e_devkit_fmc.dtsi" 

&fmc_mux_select_0 {
    status = "okay";
};

&fmc_mux_select_1_sfp_status {
    status = "okay";
};

&fmc_mux_select_2 {
    status = "okay";
};

You could then write your own DTBO overlay which extends on this to add the gpio-hog entries. For example you could write socfpga_agilex5_mitysom_devkit_fmc_custom.dtso:

/dts-v1/;
/plugin/;

&fmc_mux_select_0 {
      fmc-sel-la06-hog {
              gpio-hog;
              gpios = <0 0>;          /* bit 0 = FMC_SEL_LA06 */
              output-low;             /* low selects the HVIO pin, high selects HSIO */
      };
};

&fmc_mux_select_1_sfp_status {
      fmc-mux-en-hog {
              gpio-hog;
              gpios = <5 0>;          /* bit 5 = FMC_MUX_EN */
              output-low;             /* enable is active low, so low enables the muxes */
      };
};

The overlay loading is handled by the boot.scr script which is talked about here in the FMC example documentation. The example boot.cmd for the FMC example can be seen below which enabled the FMC overlay

ext2load mmc 0:2 ${kernel_addr_r} /boot/Image
ext2load mmc 0:2 ${fdt_addr_r} /boot/socfpga_agilex5_mitysom_devkit.dtb
fdt addr ${fdt_addr_r}
echo "Applying /boot/socfpga_agilex5_mitysom_devkit_fmc.dtbo" 
ext2load mmc 0:2 ${fdtoverlay_addr_r} /boot/socfpga_agilex5_mitysom_devkit_fmc.dtbo
fdt resize ${filesize}
fdt apply ${fdtoverlay_addr_r}

So an additional line can be added to load the new custom overlay like below:

ext2load mmc 0:2 ${kernel_addr_r} /boot/Image
ext2load mmc 0:2 ${fdt_addr_r} /boot/socfpga_agilex5_mitysom_devkit.dtb
fdt addr ${fdt_addr_r}
echo "Applying /boot/socfpga_agilex5_mitysom_devkit_fmc.dtbo" 
ext2load mmc 0:2 ${fdtoverlay_addr_r} /boot/socfpga_agilex5_mitysom_devkit_fmc.dtbo
fdt resize ${filesize}
fdt apply ${fdtoverlay_addr_r}
echo "Applying /boot/socfpga_agilex5_mitysom_devkit_fmc_custom.dtbo" 
ext2load mmc 0:2 ${fdtoverlay_addr_r} /boot/socfpga_agilex5_mitysom_devkit_fmc_custom.dtbo
fdt resize ${filesize}
fdt apply ${fdtoverlay_addr_r}
fdt resize

So with an updated boot.scr script and a new custom dtbo, you should be able to extend your changes on top of what we already have put in place.

If you wanted to take this even one step further to recreate the entire BSP, you can follow the Yocto build instructions here but add your own custom meta-layer to the Yocto build. So you would follow the instructions on that page up to "Source the Yocto Environment" but before "Build the filesystem" and do the following to add your own meta-layer:

bitbake-layers create-layer ../meta-yourcompany
bitbake-layers add-layer ../meta-yourcompany

Then create the following file - meta-yourcompany/recipes-kernel/linux/linux-cl-socfpga-lts_%.bbappend:

FILESEXTRAPATHS:prepend := "${THISDIR}/files-fmc-hogs:" 

SRC_URI += "file://socfpga_agilex5_mitysom_devkit_fmc_custom.dtso" 

KERNEL_DEVICETREE:append = " intel/socfpga_agilex5_mitysom_devkit_fmc_custom.dtbo" 

do_patch:append() {
      install -m 0644 ${WORKDIR}/socfpga_agilex5_mitysom_devkit_fmc_custom.dtso \
              ${S}/arch/arm64/boot/dts/intel/
}

Then add your socfpga_agilex5_mitysom_devkit_fmc_custom.dtso to meta-yourcompany/recipes-kernel/linux/files-fmc-hogs/ so the resulting file structure looks like:

meta-yourcompany/
├── conf/
│   └── layer.conf                 <- generated, no edits needed
├── COPYING.MIT                    <- generated
├── README                         <- generated, worth filling in
├── recipes-example/               <- generated placeholder, delete it
│   └── example/
│       └── example_0.1.bb
└── recipes-kernel/                <- everything below here is yours
    └── linux/
        ├── linux-cl-socfpga-lts_%.bbappend
        └── files-fmc-hogs/
            └── socfpga_agilex5_mitysom_devkit_fmc_custom.dtso

Then you can proceed with the "Build the filesystem" step of the instructions.

Or if you just wanted to take an easy path for now, you could just inject the compiled dtbo onto the SD card when creating it from the instruction here and place the socfpga_agilex5_mitysom_devkit_fmc_custom.dtbo into rootfs_overlay/boot

dtc -I dts -O dtb -o rootfs_overlay/boot/socfpga_agilex5_mitysom_devkit_fmc_custom.dtbo \
    socfpga_agilex5_mitysom_devkit_fmc_custom.dtso

Let me know if you have any questions.

- Mike