Activity
From 06/28/2016 to 07/27/2016
07/27/2016
- 05:19 PM FPGA Development: RE: Communication EGD or ModBus/TCP Cores
- Good question, I'm not sure if there are any files on there that specify which version it is. But if nobody has upda...
- 05:06 PM FPGA Development: RE: Communication EGD or ModBus/TCP Cores
- How can I check my currently devkit MDK?
- 03:56 PM FPGA Development: RE: Communication EGD or ModBus/TCP Cores
- Looks like you are using the older toolchain which apparently doesn't have the rpl_* support. This post gives some p...
- 03:34 PM FPGA Development: RE: Communication EGD or ModBus/TCP Cores
- Jonathan,
I used the tarball instead of the git, I share you my log, it is different than yours, it is attached.
... - 01:43 PM FPGA Development: RE: Communication EGD or ModBus/TCP Cores
- I created a FAQ entry for future reference to building autotools based libraries.
https://support.criticallink.com/r... - 01:33 PM FPGA Development: RE: Communication EGD or ModBus/TCP Cores
- Hector Bojorquez wrote:
> I got the error in Eclipse Console messages I have not tried on the MitySOM, I tried the ... - 11:58 AM FPGA Development: RE: Communication EGD or ModBus/TCP Cores
- I got the error in Eclipse Console messages I have not tried on the MitySOM, I tried the $file command and it looks ...
- 11:03 AM FPGA Development: RE: Communication EGD or ModBus/TCP Cores
- Where did you get this error? When running the program on the L138?
The error usually indicates the object was bu... - 10:47 AM FPGA Development: RE: Communication EGD or ModBus/TCP Cores
- Hi,
Well I have *.so* and a *.la* file, the _dinamic library_ and the _static library used by the GNU "libtools" p...
07/26/2016
- 04:41 PM FPGA Development: RE: Communication EGD or ModBus/TCP Cores
- Hector,
Concerning the Vivado question:
At this time we do not recommend using Vivado as it does not support th... - 04:22 PM FPGA Development: RE: Communication EGD or ModBus/TCP Cores
- I would have expected you to get either get a .a or .so file.
http://stackoverflow.com/a/12237595
https://stackov... - 04:16 PM FPGA Development: RE: Communication EGD or ModBus/TCP Cores
- I added the library and its path, but I did not get any .lib file after the library installation, Should I have a .l...
- 02:59 PM FPGA Development: RE: Communication EGD or ModBus/TCP Cores
- Hector Bojorquez wrote:
> Hi Jonathan and Alex,
>
> It is really helpful information, thank you.
>
> I did not... - 02:33 PM FPGA Development: RE: Communication EGD or ModBus/TCP Cores
- Hi Jonathan and Alex,
It is really helpful information, thank you.
I did not know about libmodbus library, now ...
07/20/2016
- 03:21 PM FPGA Development: RE: Communication EGD or ModBus/TCP Cores
- Hector,
I spoke with Jon C. about this issue and we have a little more followup.
In the past for the MitySOM/DS... - 10:16 AM FPGA Development: RE: Communication EGD or ModBus/TCP Cores
- Hector Bojorquez wrote:
> Hi,
>
> I'm a beginner with FPGA and embedded systems, now I'm creating a communication... - Hi,
I'm a beginner with FPGA and embedded systems, now I'm creating a communication between some devices and the M...
07/12/2016
- 09:02 AM Software Development: RE: SPI1 controller, access to FLASH and carrier board. NOT linux based.
- Excellent glad you got it working.
- 12:16 AM Software Development: RE: SPI1 controller, access to FLASH and carrier board. NOT linux based.
- Johnathan,
Joy Joy, Happy Happy.
Everything is working. There were three items altogether. First was the "open...
07/11/2016
- 05:06 PM Software Development: RE: L138 dsplink problem - schedule while atomic bug
- I looked deeper into the error we were provoking on our bench; it turned out to be a c++ vector de-referencing error ...
07/09/2016
- 06:24 PM Software Development: RE: SPI1 controller, access to FLASH and carrier board. NOT linux based.
- Ian St. John wrote:
> Can you confirm that the signal marked as 'reserved' just beside the SPI1_CSC1 is the SPI1_CSC... - 05:56 PM Software Development: RE: SPI1 controller, access to FLASH and carrier board. NOT linux based.
- Hmm. I asked the EE about the diagram and he was interested in the fact that there was a pull up on the CS line. Appa...
- 12:40 AM Software Development: RE: SPI1 controller, access to FLASH and carrier board. NOT linux based.
- The eeprom is on the i2c0 bus. I'm assuming you are talking about the SPI Nor flash which is on SPI1_CS0.+
Oops... - 01:23 PM Software Development: RE: L138 dsplink problem - schedule while atomic bug
- Hi Fred,
Syslink is newer than DSPlink, though in the context of the L138 it's very similar code (syslink evolved ... - 12:11 PM Software Development: RE: L138 dsplink problem - schedule while atomic bug
- The error collected above was on the bench after making some minor software changes seemingly unrelated with the code...
- 11:23 AM Software Development: RE: L138 dsplink problem - schedule while atomic bug
- I found the following on the TI site; looks like they struggled with this issue with sys-link... I'm not sure how sys...
07/08/2016
- I think there may be a bug in the dsplink kernel code that causes the scheduler to run after a call to spinlock. "rem...
- 09:33 AM Software Development: RE: SPI1 controller, access to FLASH and carrier board. NOT linux based.
- Ian St. John wrote:
> I am building and programming a custom board without Linux. Basic embedded drivers running fro...
07/05/2016
- I am building and programming a custom board without Linux. Basic embedded drivers running from SPI1,CS0 (8MB NOR Fla...
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