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From 12/09/2017 to 01/07/2018

01/04/2018

02:06 PM Software Development: Real time signal input and output with uPP interface in MityDSP
Hi,
I have a custom board with
1) MityDspl-138F module (with FPGA)
2) No Ethernet port
3) UART,USB,SD CARD int...
Vivek Ponnani

12/27/2017

09:57 AM Software Development: RE: Changing UART1 to UART2 in Linux Kernel
Just noticed I left the @bootargs@ as @ttyS1@.
Changing that to @ttyS2@ solved that issue.
Sorry, I wasn't expectin...
Okan Çalış
05:32 AM Software Development: Changing UART1 to UART2 in Linux Kernel
Hi,
We've been working on a MityDsp-L138F board, and I can boot to Linux with NFS, with the following environment va...
Okan Çalış

12/21/2017

11:56 AM Software Development: Low frequency input (5 Hz to 20KHz processing) for mitydspl138F
Hi,
I have a custom board with
1) MityDspl-138F module (with FPGA)
2) No Ethernet port
3) UART,USB,SD CARD int...
Vivek Ponnani

12/12/2017

11:13 PM FPGA Development: RE: Core Creation Guidelines
Jorden Luke wrote:
> I am trying to get some help with this one as well. Is there are up date to this one?
It doe...
Jonathan Cormier
06:52 PM FPGA Development: RE: Core Creation Guidelines
I am trying to get some help with this one as well. Is there are up date to this one? Jorden Luke

12/11/2017

05:01 PM Software Development: RE: Loading kernel to SPI flash and Root file system .jffs2 to NAND.
Vivek Ponnani wrote:
> My queries are as below
>
> 1) I checked *Installing the Kernel on SPI - FLASH* topic unde...
Jonathan Cormier
02:24 PM Software Development: Loading kernel to SPI flash and Root file system .jffs2 to NAND.
Hi,
I have a custom board with
1) MityDspl-138F module (with FPGA)
2) No Ethernet port
3) UART,USB,SD CARD int...
Vivek Ponnani
 

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