Mity CPU Platforms » MitySOM-5CSX Altera Cyclone V

11/25/2014

07:46 AM FPGA Development: RE: Writing to HPS memory

I would recommend contacting your Arrow FAE or Altera for help with the device tree generation / sopcinfo file.
Yo... Michael Williamson

07:39 AM FPGA Development: Writing to HPS memory

Hi,
I'm want to use the hps_ddr_write_example design from critical link and test it on Arrow Terasic Cyclone V SOC... Vidya Govindan

11/17/2014

02:35 PM Software Development: RE: Kernel Driver

Hi
I compiled the kernel driver with the Linux kernel in the instruction here (https://support.criticallink.com/re... Anonymous

11/13/2014

04:26 PM Software Development: Kernel Driver

Hi,
I'm trying to lad a kernel driver by following example on this page https://github.com/zhemao/interrupt_exampl... Anonymous

11/12/2014

02:38 PM Software Development: SOCKIT GSRD

Hi,
For my project, I'm trying to use precompiled Linux libraries with Sockit as seen in this link "http://rocketb... Anonymous

11/07/2014

02:22 PM FPGA Development: RE: Modular SGDMA

Hi Jack,
We don't have any explicit examples of this but you will want to look into the userspace I/O driver. This... Daniel Vincelette

11/05/2014

01:40 PM FPGA Development: RE: Modular SGDMA

Hi Dan,
The issue seems to be with the polling. I brought out the empty signal to an oscilloscope and found that i... Anonymous

10/29/2014

10:58 AM Software Development: RE: Performance problem with baremetal code

In the meanwhile and after an ARM Cortex training I've found the root cause of the problem:
For enabling the cache... Christian Kempter