Mity CPU Platforms » MitySOM-5CSX Altera Cyclone V

04/30/2021

DV 02:01 PM FPGA Development: RE: Using Signal Tap with the L2-3Y8 dev kit

Hi Travis,
I'm sorry for the long delay, are still seeing issues with SignalTap? My normal flow for SignalTap debug especially if the HPS is accessing cores on the bridges is to convert my SOF to a RBF and have u-boot program it on bo... Daniel Vincelette

04/19/2021

TR 10:17 PM FPGA Development: Using Signal Tap with the L2-3Y8 dev kit

Hello,
I am trying to get Signal Tap working on the my system, but I keep running into failures. I am able to connect a usb-blaster device to the JTAG pins on the white connector. I am also able to find the hardware (usb-blaster) and ... Travis Rawson

DV 04:08 PM FPGA Development: RE: Coldstart problem. Loading FPGA through Linux.

Hello,
I don't believe the RTC error message is related to the FPGA not programming. Can you post a boot log when trying to boot at -40°C? Also just to double-check are you using an industrial temp SD card?
Best regards,
Dan Daniel Vincelette

SV 03:09 PM FPGA Development: Coldstart problem. Loading FPGA through Linux.

Hello everyone,
we use the MitySOM module in our project. In works perfectly fine down to -40°C but only if the FPGA is booted at the ambient temperature above 0°C. The HPS part is not used in the project, it`s needed only for booting... Sergey Volkovoy