Activity
From 07/24/2016 to 08/22/2016
08/22/2016
- SS 02:10 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: HDMI Output splash screen is intermittently displayed on boot
- That's ok, thanks for the update Dan. Feel free to post an updated image anytime, even if you don't have a ton of testing. I don't mind being a guinea pig if it gets us to a working example a little bit sooner.
- DV 02:07 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: HDMI Output splash screen is intermittently displayed on boot
- Steve,
I'm terribly sorry for the radio silence. Unfortunately I've been travelling for the past week so I haven't been able put as much time towards this as I'd like. Thank you for providing the scope captures, the data looks to be p... - SS 07:43 AM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: HDMI Output splash screen is intermittently displayed on boot
- Hi Dan,
Any update on this? Have you been able to review the scope shots?
Best,
Steve
08/17/2016
- SS 10:35 AM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: HDMI Output splash screen is intermittently displayed on boot
- Hi Dan,
See attached. The index.txt file in the zip package describes each scope shot. Let me know what other measurements I can take.
I've read there is a Quartus reference design for the Microtronix card. Have you compared you...
08/16/2016
- SS 03:35 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: HDMI Output splash screen is intermittently displayed on boot
- Hi Dan,
Sure thing, I can take these shots first thing in the morning and get them back to you.
Steve - DV 01:12 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: HDMI Output splash screen is intermittently displayed on boot
- Hi Steve,
Hmm good point that it you've already vetted the monitor you're using. Seeing as you're getting the display to come out of standby and you're boot log didn't have any I2C errors, I'm going to assume the configuration of the ... - SS 07:39 AM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: HDMI Output splash screen is intermittently displayed on boot
- Hi Dan,
Thanks for the detail on the I2C fix.
I've tested on two monitors. On one of them, I am certain it supports 1280x720 because I can set it to that resolution when driving it with my PC. Additionally, this monitor is the on... - BW 03:05 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Network Communication MitySOM Custom Kernel Configuration
- Jonathan/Dan,
Solved.... Yes, that was the difference in the two kernels, ipv6 was being built as a module in the custom. Changed to be built into kernel and all works as expected. Thanks for the support.
Brian
08/15/2016
- DV 04:12 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Network Communication MitySOM Custom Kernel Configuration
- Hi Brian,
I've updated the wiki for building the kernel and have added steps for building the modules, it can be found here: https://support.criticallink.com/redmine/projects/mityarm-5cs/wiki/Linux_Kernel
The steps at the bottom (... - JC 03:20 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Network Communication MitySOM Custom Kernel Configuration
- Both udp6/tcp6 and '::' points to an error with ipv6 support. Looking at your .config file shows ipv6 being built as a module (CONFIG_IPV6=m). If you either build ipv6 support into your kernel or insert the kernel module and see if thi...
- BW 03:05 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Network Communication MitySOM Custom Kernel Configuration
- Jonathan,
So I built a new kernel setting the base configuration as mitysom5csx_devkit_defconfig without doing the menuconfig and building the uImage. Then I added that uImage to the /boot folder in the rootfs that is on the SD image ... - DV 03:11 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: HDMI Output splash screen is intermittently displayed on boot
- Hi Steve,
Sorry for the delay, I was travelling Friday afternoon.
To fix for the I2C issue was that I resampled and debounced the I2C signals coming into the FPGA before feeding them to the HPS I2C master. I expected the HPS to ta... - SS 10:45 AM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: HDMI Output splash screen is intermittently displayed on boot
- Hi Dan,
This image doesn't show anything on my monitor. Upon first booting it, right after the console printed "Setting Up HDMI Transmitter", the monitor came out of standby but the screen stayed black. After powering the system off...
08/12/2016
- BW 03:27 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Network Communication MitySOM Custom Kernel Configuration
- I have both the L2_3Y8 and H4_3YA.. Attached is the config file for my 3YA. Dont think it really matters. Both error with the Firefox COAP.
Thanks for the help,
Brian - JC 02:25 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Network Communication MitySOM Custom Kernel Configuration
- Can you post your .config file?
Thanks
Jonathan Cormier - Hello,
I have a MitySOM dev board with the 5CSE-H4-3YA. I am able to use the pre-built binary SD card image for network communication using Firefox Copper with udp COAP packets. The program has no problem identifying the host IP infor... - SS 12:15 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: HDMI Output splash screen is intermittently displayed on boot
- Hi Dan
Thanks for this. I can try the image on Monday and report back results.
Can you provide a little detail on the fix? Alternately if it is in Git (or will be there shortly), I can just look at the commit.
Best,
Steve - DV 11:56 AM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: HDMI Output splash screen is intermittently displayed on boot
- Hello Steve,
I've created an alpha SD card image that from my testing has fixed the i2c failures. The filesystem also now has X11 and launches XFCE on boot (if you have a USB OTG cable a mouse/keyboard can be used)
The image should...
08/11/2016
- JK 10:05 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: Using PREEMPT_RT on MitySOM 5CSX Dev Board
- Hi Dan,
The network stability problem has disappeared after removing the skews. Thanks for the suggestion!
I'll soon proceed with additional defconfig/dts modifications, starting with the suggestions above.
Thanks,
Jared
08/10/2016
- DV 11:12 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: Using PREEMPT_RT on MitySOM 5CSX Dev Board
- Hi Jared,
Looking at the sockit dts(https://github.com/altera-opensource/linux-socfpga/blob/socfpga-4.1.22-ltsi-rt/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts) I see they are setting skews for the data clocks for the RGMII phy. We d... - JK 10:38 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: Using PREEMPT_RT on MitySOM 5CSX Dev Board
- Hello Dan,
I've been performing more testing on the Altera 4.1.22 LTSI RT branch.
Physical setup: MitySOM 5CSX H6 HYA dev kit connected to network via Ethernet (J500).
Altera 4.1.22 LTSI RT does indeed get an IP address, but the...
08/09/2016
- DV 10:30 AM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: HDMI Output splash screen is intermittently displayed on boot
- Hello Steve,
There was a bit of stability issue with the I2C interface to the HDMI transmitter IC. I thought my newest build of the demo had the stability issue ironed out though, let me take try it here again and I'll post back with ... - Hello,
I'm trying to run the HDMI output image provided on the wiki. I haven't modified anything just written the image to an SD card.
When booting, the splash screen sometimes shows up, but usually doesn't. I'm also intermittent... - DV 10:24 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: Using PREEMPT_RT on MitySOM 5CSX Dev Board
- Hi Jared,
Glad to hear that worked for you! If you run into trouble getting your defconfig/dts setup how you want just let me know.
Dan - JK 09:40 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: Using PREEMPT_RT on MitySOM 5CSX Dev Board
- Hello Dan,
Thanks for pushing the dizzy (1.7) branch. I've successfully gotten to the same point you did in your first reply via a Yocto build (Altera Linux 4.1.22 LTSI RT is booting and receiving an IP address, but still need to modi...
08/05/2016
- DV 02:05 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Using PREEMPT_RT on MitySOM 5CSX Dev Board
- Hi Jared,
Sorry for the delay.
I just pushed a dizzy(1.7) branch to our git repo: http://support.criticallink.com/gitweb/?p=meta-mitysom-5csx.git;a=shortlog;h=refs/heads/dizzy
This will use gcc 4.9.1 for the toolchain, which shoul...
08/03/2016
- JK 03:27 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Using PREEMPT_RT on MitySOM 5CSX Dev Board
- Hello Dan,
I proceeded to try to use Yocto to build the Altera 4.1.22 LTSI RT kernel based on your suggestions above.
Unfortunately, the compilation of the kernel is erroring out because of an incompatible GCC version. The followin...
08/02/2016
- DV 11:55 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: Using PREEMPT_RT on MitySOM 5CSX Dev Board
- Hello Jared,
That sounds like a perfect approach. For building the file system we do use yocto, which as you saw is pointed to use the 3.16 kernel. Now depending on how manual you want to do this I can suggest a few options.
Probab... - JK 10:26 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: Using PREEMPT_RT on MitySOM 5CSX Dev Board
- Hello Dan,
I've been going through the instructions on the Wiki to get an SD card image of my creation working. I'm starting with the 3.16 kernel version provided by Critical Link to get a handle on the process of building an SD card ...
07/29/2016
- DV 03:01 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Using PREEMPT_RT on MitySOM 5CSX Dev Board
- Hello Jared,
I did a quick test here and was able to boot altera's 4.1.22 ltsi rt kernel using the MitySOM-5CSX dev kit. I used the socfpga_defconfig and socfpga_cyclone5_sockit.dts. I didn't do an extensive test but was able to boot ...
07/28/2016
- Context: My company recently purchased some MitySOM 5CSX Development Boards and would like to use them on a current project. This project likely has the need for a real-time operating system. I want to start by using Linux with the PREEM...
07/27/2016
- JC 05:19 PM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: Communication EGD or ModBus/TCP Cores
- Good question, I'm not sure if there are any files on there that specify which version it is. But if nobody has updated it since you bought it then it will be running the older MDK filesystem.
- HB 05:06 PM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: Communication EGD or ModBus/TCP Cores
- How can I check my currently devkit MDK?
- JC 03:56 PM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: Communication EGD or ModBus/TCP Cores
- Looks like you are using the older toolchain which apparently doesn't have the rpl_* support. This post gives some possible solutions.
https://www.linuxquestions.org/questions/linux-software-2/undefined-reference-to-%60rpl_malloc'-5872... - HB 03:34 PM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: Communication EGD or ModBus/TCP Cores
- Jonathan,
I used the tarball instead of the git, I share you my log, it is different than yours, it is attached.
I can see some Errors. After this Should I be able to compile in Eclipse using the library ?
Thanks,
Hector - JC 01:43 PM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: Communication EGD or ModBus/TCP Cores
- I created a FAQ entry for future reference to building autotools based libraries.
https://support.criticallink.com/redmine/projects/arm9-platforms/wiki/ARM_Software_FAQs#Building-library-which-uses-autotools - JC 01:33 PM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: Communication EGD or ModBus/TCP Cores
- Hector Bojorquez wrote:
> I got the error in Eclipse Console messages I have not tried on the MitySOM, I tried the $file command and it looks good
> ...
This shows that the object file your trying to use was built of an intel processo... - HB 11:58 AM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: Communication EGD or ModBus/TCP Cores
- I got the error in Eclipse Console messages I have not tried on the MitySOM, I tried the $file command and it looks good
!File_Command.PNG!
I want to share you the Library installation log, it is attached, the installation created s... - JC 11:03 AM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: Communication EGD or ModBus/TCP Cores
- Where did you get this error? When running the program on the L138?
The error usually indicates the object was built for a different architecture or using a different toolchain. You can use the @file@ command to verify if it was pro... - HB 10:47 AM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: Communication EGD or ModBus/TCP Cores
- Hi,
Well I have *.so* and a *.la* file, the _dinamic library_ and the _static library used by the GNU "libtools" package._
I tried to add the libmodbus with the .so file to the linker following the wiki for adding dsplink.lib file...
07/26/2016
- AB 04:41 PM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: Communication EGD or ModBus/TCP Cores
- Hector,
Concerning the Vivado question:
At this time we do not recommend using Vivado as it does not support the Spartan 6 based devices. We recommend Xilinx ISE 14.X and frankly to begin with you can start with their free webpack ... - JC 04:22 PM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: Communication EGD or ModBus/TCP Cores
- I would have expected you to get either get a .a or .so file.
http://stackoverflow.com/a/12237595
https://stackoverflow.com/questions/8332460/how-do-i-include-a-statically-linked-library-in-my-eclipse-c-project - HB 04:16 PM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: Communication EGD or ModBus/TCP Cores
- I added the library and its path, but I did not get any .lib file after the library installation, Should I have a .lib file?
I only got some "modbus..".h files and one .pc file - JC 02:59 PM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: Communication EGD or ModBus/TCP Cores
- Hector Bojorquez wrote:
> Hi Jonathan and Alex,
> ...
Did you add the library to the linker? See the following link for how we add the dsplink.lib file. https://support.criticallink.com/redmine/projects/arm9-platforms/wiki/DSP_Hello_W... - HB 02:33 PM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: Communication EGD or ModBus/TCP Cores
- Hi Jonathan and Alex,
It is really helpful information, thank you.
I did not know about libmodbus library, now I'm trying to use it but it looks like the compiler is not linking correctly the modbus library, I added the library pat...