Mity CPU Platforms

10/26/2018

01:30 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Uart speed does not change when loading uboot. The variable "baudrate" has no effect.

It is unusual for a design to change its debug UART's baud rate dynamically. The majority of our designs use the 115... Jonathan Cormier

10/12/2018

11:44 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: LinuxPTP: 1PPS output is running at 0.1Hz

Hi Dan
All clocks have been checked on a scope and are running at expected frequencies.
My HPS clock is 100MHz, a... V J

10/11/2018

05:00 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: Uart speed does not change when loading uboot. The variable "baudrate" has no effect.

The baudrate of the UART port when loading uboot does not depend on the value from the environment variable "baudrate... Roman Kochkin

01:05 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: LinuxPTP: 1PPS output is running at 0.1Hz

Hi Vidar,
As a quick test can you output the clock you are using to a pin and verify its frequency on a scope?
Dan Daniel Vincelette

10:56 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: LinuxPTP: 1PPS output is running at 0.1Hz

Hi
I changed to use netdev_info (instead of netdev_dbg) logging in stmmac_main.c and then I get:... V J

10/10/2018

12:50 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: LinuxPTP: 1PPS output is running at 0.1Hz

Hi Alex
In /var/log/boot there are no PTP debug messages.
Looking into stmmac_main.c, these PTP messages are prin... V J

10/09/2018

10:26 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: LinuxPTP: 1PPS output is running at 0.1Hz

Vidar,
If you look through your boot log do you see either of the following debug printouts?... Alexander Block

10/08/2018

01:02 PM MitySOM-5CSX Altera Cyclone V Software Development: LinuxPTP: 1PPS output is running at 0.1Hz

Hi
We have started implementing PTP on the MitySOM-5CSX board.
The first step is to get software timestamping to wo... V J