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From 03/24/2019 to 04/22/2019

04/16/2019

01:19 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: UPP problem
Thanks for bringing this up again. We'll look into it. Jonathan Cormier

04/13/2019

12:51 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: UPP problem
+1. Just wanted to give attention to this solution, which also solved a 2-day problem that I was having when receivin... Douglas Gomes

04/10/2019

11:08 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Latest MityDSP-L138 U-Boot image
Thanks, that's great. Mathew Jones

04/09/2019

04:02 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Latest MityDSP-L138 U-Boot image
Hi Mathew,
Jon spoke to me about building the files for you. I've attached the files you were asking for.
Federico Rueda
02:22 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Latest MityDSP-L138 U-Boot image
Thanks for that quick info.
I've realised that the u-boot.img file you attached is without the UBL header and so i...
Mathew Jones

04/08/2019

03:29 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Latest MityDSP-L138 U-Boot image
Mathew Jones wrote:
> Hi,
> As part of investigating the impacts of the 8MB NOR Flash obsolescence and its 16MB rep...
Jonathan Cormier
02:51 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: Latest MityDSP-L138 U-Boot image
Hi,
As part of investigating the impacts of the 8MB NOR Flash obsolescence and its 16MB replacement (PCN 20180209000...
Mathew Jones

03/27/2019

09:53 AM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Problem when programming FPGA from HPS
I attach the simple block diagram-based Quartus project that takes in input a 100 MHz differential clock and outputs ... Davide Vaccaro

03/26/2019

05:23 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Problem when programming FPGA from HPS
Can attach a copy of your reference project? Is it based off of the one on our support site?
-Mike
Michael Williamson
04:55 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Problem when programming FPGA from HPS
So, I tried all the methods listed in https://rocketboards.org/foswiki/view/Documentation/GSRD131ProgrammingFPGA, but... Davide Vaccaro

03/25/2019

03:11 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Problem when programming FPGA from HPS
Hi Mike,
in the "final" Quartus program I will indeed need to change the configurations you mentioned, but for a s...
Davide Vaccaro
 

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