Mity CPU Platforms

12/04/2025

08:04 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Configuring OMAP-L138 peripherals from uBoot

Jonathan,
If StarterWare/BareMetal are against the grain, please point me towards DSPBios code/examples that use McA... Michael B

07:27 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Configuring OMAP-L138 peripherals from uBoot

Hi Michael, We have only used the DSP with TI's DSPBios RTOS. It should already have abstraction layers for most of... Jonathan Cormier

12/03/2025

10:46 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: uBoot I2C Speed Command [MityDSP L138]

Michael B wrote:
> Hi All,
> I'm in the middle of debugging some I2C issues and was curious how the uBoot i2c speed... Jonathan Cormier

09:39 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: uBoot I2C Speed Command [MityDSP L138]

As a follow up, is there any way to test I2C 1 bus through uBoot? Michael B

09:20 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: uBoot I2C Speed Command [MityDSP L138]

Hi All,
I'm in the middle of debugging some I2C issues and was curious how the uBoot i2c speed command is handled. I... Michael B

09:38 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: Configuring OMAP-L138 peripherals from uBoot

Hi all,
I am interested in running a bare metal application on just the DSP core, and would like some help configuri... Michael B

12/02/2025

12:47 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Issue booting encrypted bitstream on MitySOM-5CSx evaluation board

Thanks, it works. Atef Dorai

12/01/2025

04:20 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Issue booting encrypted bitstream on MitySOM-5CSx evaluation board

Atef,
Can you make sure you have the MSEL set appropriately per the table below?
!image.png! Mike Fiorenza

03:40 PM MitySOM-5CSX Altera Cyclone V FPGA Development: Issue booting encrypted bitstream on MitySOM-5CSx evaluation board

Hello,
I am trying to test bitstream encryption on a MitySOM-5CSx evaluation board and I am running into an issue du... Atef Dorai

12:30 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Uart issue in Am62P

Hi Rajkumar,
Is the only difference between the AM62P working and not the use of the application code vs. the loop... Michael Williamson

04:37 AM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: Uart issue in Am62P

Hi,
We are working with the Critical Link AM62P and AM62a SoM and have installed Debian 13 on am62P the system. We... Rajkumar Dumala

11/28/2025

03:57 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Using the design security for MitySOM-5CSX

Hello,
I would like to encrypt the FPGA bitstream on the MitySOM-5CSX. I have been referring to Intel’s application ... Atef Dorai

11/19/2025

12:43 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Building the MitySOM-5CSX

Seth,
I got the GPIO pin on the FPGA side to work as you described. This is just as good as having an LED because t... John Iannuzzi

11/14/2025

08:59 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Clarification regarding LED 4 on MitySOM-5CSX DevKit

Atef,
Okay that makes sense! In that case, I would look into Arm Developer Studio then. You should be able to obta... Mike Fiorenza

08:50 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Clarification regarding LED 4 on MitySOM-5CSX DevKit

Mike,
Thank you for your response, I’ll have a look at it.
I was focusing on using JTAG because I’m having an issue... Atef Dorai

04:03 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Clarification regarding LED 4 on MitySOM-5CSX DevKit

Atef,
If you see our Wiki page here: https://support.criticallink.com/redmine/projects/mityarm-5cs/wiki we post fu... Mike Fiorenza

03:50 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Clarification regarding LED 4 on MitySOM-5CSX DevKit

Mike, Thanks for your response. Yes, I was trying to load the compiled C code binary directly to the HPS via JTAG. Si... Atef Dorai

03:42 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Clarification regarding LED 4 on MitySOM-5CSX DevKit

Atef,
Glad to hear you resolved your JTAG issue. Can you elaborate on how you are trying to load the HPS portion? ... Mike Fiorenza

10:31 AM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Clarification regarding LED 4 on MitySOM-5CSX DevKit

Thank you Mike, the system works by reversing the USB Blaster connection. I have another question please: Do you have... Atef Dorai

11/12/2025

04:23 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Clarification regarding LED 4 on MitySOM-5CSX DevKit

Atef,
From your picture, it looks like you have the JTAG pod plugged in backwards. Pin 1 on your ribbon cable does... Mike Fiorenza

04:13 PM MitySOM-5CSX Altera Cyclone V FPGA Development: JTAG programming issue on MitySOM-5CSX DevKit with Quartus (Windows 11)

Hello,
I’m trying to program a MitySOM-5CSX board via JTAG using Quartus on Windows 11, but I encounter an error im... Atef Dorai

11/07/2025

04:38 PM MitySBC-Agilex5 FPGA Development: RE: MitySBC A5E

Thank you for the information. I am guessing the pre-installed FPGA does not enable FMC_EN_3V3.
I will start with o... Sung Lim

04:24 PM MitySBC-Agilex5 FPGA Development: RE: MitySBC A5E

Hi Sung,
From the datasheet (page 14):
"All power to the FMC connector is gated by FMC_EN_3V3 which is tied to ... Michael Williamson

03:06 PM MitySBC-Agilex5 FPGA Development: MitySBC A5E

Two questions:
1. On the prototype board, FMC +12V and +3.3V do not appear to be driven. Is there a strapping optio... Sung Lim

11/06/2025

06:44 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P PCB Development: RE: SOM_62P Reset on LED_RTN

Wondering if you could add a LPF filter (cap + R) across your FET to make the switch less aggressive. Kind of hacky,... Michael Williamson

06:28 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P PCB Development: RE: SOM_62P Reset on LED_RTN

That explanations seems probable, if I have any free time coming up I'll play around with the circuit on our side to ... Adrian De Vico

06:15 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P PCB Development: RE: SOM_62P Reset on LED_RTN

Hi Adrian,
Haven't seen this before.
This is a snippet from the SOM schematic related to the Power Good LED a... Michael Williamson

05:45 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P PCB Development: SOM_62P Reset on LED_RTN

We have a series of switchable LEDs on board for basic debugging of various on-board supplies, and for completeness I... Adrian De Vico