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A5E-HVIO-Example

Overview

The A5E HVIO example adds the HVIO subsystem to the base reference design. This addition allows for the use of the HVIO pins that are accessible via connectors P8 and P9 on the MitySOM-Mini development kit. The HVIO pins are set to 3.3V LVCMOS in this example.

HVIO Subsystem

The HVIO subsystem contains four major blocks:
  • pio_# - three PIO controllers that export and connect to the HVIO pins
  • clock_bridge_0 - provides the internal subsystem clock
  • mm_bridge_0 - bridges the fabric-side Avalon-MM interface to the HVIO
  • reset_bridge_0 - provides the internal subsystem reset

At the top level of the design:

  • The subsystem clock is driven from hps_subsys.intel_agilex_5_soc_0_h2f_user0_clk
  • The subsystem reset is driven from fabric_reset_controller_0.reset_out
  • The HVIO pins are exported to the FPGA-side PIO interface pins
             hps_subsys.intel_agilex_5_soc_0_h2f_user0_clk (100 MHz example)           
                                             │
                                             ▼
                                ┌──────────────────────────┐
                                │      clock_bridge_0      │         ┌──────────────────────────┐
                                └────────────┬─────────────┘         │                          │
                                             │                       │        pio_{0,1,2}       │
                                        ┌──clock────────────────────►│                          │────►hvio_subsys.pio_{0,1,2}_external_connection
                                        │    │                       └──────────────────────────┘
                                        │    │                                     ▲        ▲
                                        │    │                                     │        │
                                        │    ▼                                     │        │
                                        │ ┌──────────────────────────┐             │        │
                                        │ │       mm_bridge_0        │◄────────────┘        │
                                        │ │   (Avalon-MM to PIO)     │                      │
                                        │ └──────────────────────────┘                      │
                                        │              ▲                                    │
                                        │              │reset                               │reset
                                        ▼              │                                    │
                                     ┌─────────────────┴────────────────────────────────────┴┐
fabric_reset_controller_0.reset_out ►│                    reset_bridge_0                     │
                                     └───────────────────────────────────────────────────────┘

What This Project Offers

This project provides:
  • Pin out of all the HVIO pins on connectors P8 and P9.
  • Inclusion of GPIO controllers in the device tree to allow for control of the HVIO via sysfs and libgpiod in Linux.
  • Framework for utilizing the HVIO pins in projects.
  • Ability to connect additional hardware via P8 and P9 connectors to interface via the HVIO.

Memory Offsets

The three PIO controllers have a base address of 0x20000400 with offsets of 0x0000, 0x0020, and 0x0040 respectively.

Building the Example

Compile the FPGA design

Refer to Building_fpga_261pro for building the FPGA design. Navigate into the mitysom-a5e-mini-ref-hvio example project before compiling the design.

  • Ensure to flash the resulting a5e.hps.jic onto the hardware
  • Ensure to replace the a5e.core.rbf on the SD card

Using the Example

Controlling HVIO from Linux

The HVIO pins are exposed to Linux as GPIO controllers and are driven with libgpiod. In the device tree the pins are named after their connector and pin number following a "{Connector Number}_{Pin Number}" format, so the HVIO pin on connector P8 pin 22 is named "P8_22". libgpiod addresses pins by that name, so nothing has to be looked up or calculated.

Note: the older /sys/class/gpio (sysfs) interface still exists but is deprecated, and we do not recommend it. It addresses pins by a global number that is assigned at boot, is not stable across reboots or designs, and as of kernel 6.18 is no longer reported by /sys/kernel/debug/gpio. A number carried over from an older kernel or a different design will select the wrong pin without reporting an error.

To see which chip is which, run gpiodetect. The address in each chip name matches the PIO base address given under "Memory Offsets" above.

gpiochip0 [10d120e4.gpio] (3 lines)
gpiochip1 [10c03200.gpio] (24 lines)
gpiochip2 [10c03300.gpio] (24 lines)
gpiochip3 [/soc@0/bus@20000000/gpio@440] (12 lines)
gpiochip4 [/soc@0/bus@20000000/gpio@420] (32 lines)
gpiochip5 [/soc@0/bus@20000000/gpio@400] (32 lines)
gpiochip6 [/soc@0/bus@20000000/gpio@10] (1 lines)

The primary commands are gpioinfo, gpioset and gpioget. These print info on all the pins (gpioinfo), set a pin to a specific state via a process (gpioset), and get the current state of a pin (gpioget). gpioinfo prints each chip, the name of the pin in the device tree, and its state. The three HVIO chips look like this:
gpiochip3 - 12 lines:
    line   0:    "P8_24"             input
    line   1:    "P8_26"             input
    line   2:    "P8_28"             input
    line   3:    "P8_30"             input
    line   4:    "P8_32"             input
    line   5:    "P8_34"             input
    line   6:    "P8_36"             input
    line   7:    "P8_38"             input
    line   8:    "P8_40"             input
    line   9:    "P8_42"             input
    line  10:    "P8_44"             input
    line  11:    "P8_46"             input
gpiochip4 - 32 lines:
    line   0:    "P8_3"              input
    line   1:    "P8_5"              input
    line   2:    "P8_7"              input
    line   3:    "P8_9"              input
    line   4:    "P8_11"             input
    line   5:    "P8_13"             input
    line   6:    "P8_15"             input
    line   7:    "P8_17"             input
    line   8:    "P8_19"             input
    line   9:    "P8_21"             input
    line  10:    "P8_23"             input
    line  11:    "P8_25"             input
    line  12:    "P8_27"             input
    line  13:    "P8_29"             input
    line  14:    "P8_31"             input
    line  15:    "P8_33"             input
    line  16:    "P8_35"             input
    line  17:    "P8_37"             input
    line  18:    "P8_39"             input
    line  19:    "P8_41"             input
    line  20:    "P8_43"             input
    line  21:    "P8_45"             input
    line  22:    "P8_4"              input
    line  23:    "P8_6"              input
    line  24:    "P8_8"              input
    line  25:    "P8_10"             input
    line  26:    "P8_12"             input
    line  27:    "P8_14"             input
    line  28:    "P8_16"             input
    line  29:    "P8_18"             input
    line  30:    "P8_20"             input
    line  31:    "P8_22"             input
gpiochip5 - 32 lines:
    line   0:    "P9_9"              input
    line   1:    "P9_11"             input
    line   2:    "P9_13"             input
    line   3:    "P9_15"             input
    line   4:    "P9_17"             input
    line   5:    "P9_19"             input
    line   6:    "P9_21"             input
    line   7:    "P9_23"             input
    line   8:    "P9_25"             input
    line   9:    "P9_27"             input
    line  10:    "P9_29"             input
    line  11:    "P9_31"             input
    line  12:    "P9_33"             input
    line  13:    "P9_35"             input
    line  14:    "P9_37"             input
    line  15:    "P9_39"             input
    line  16:    "P9_41"             input
    line  17:    "P9_10"             input
    line  18:    "P9_12"             input
    line  19:    "P9_14"             input
    line  20:    "P9_16"             input
    line  21:    "P9_18"             input
    line  22:    "P9_20"             input
    line  23:    "P9_22"             input
    line  24:    "P9_24"             input
    line  25:    "P9_26"             input
    line  26:    "P9_28"             input
    line  27:    "P9_30"             input
    line  28:    "P9_36"             input
    line  29:    "P9_38"             input
    line  30:    "P9_40"             input
    line  31:    "P9_42"             input

To set a pin, the format is gpioset {PIN_NAME}={VALUE}, where "PIN_NAME" is the string printed by gpioinfo and "VALUE" is 0 or 1 for low or high. To read a pin, the format is gpioget {PIN_NAME}. This results in an output similar to below.
root@mity-a5e:~# gpioget P8_26
"P8_26"=active

Note: gpioset holds the line for as long as it runs, and releases it on exit. While it is running, other tools report that pin as busy, and gpioinfo shows it with a consumer= annotation. To hold an output, leave gpioset running in the background or use its --toggle option.

For more info on libgpiod, the documentation can be found here.

References