General

Profile

David Rice

Issues

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Assigned issues 0 0 0
Reported issues 0 0 0

Projects

Project Roles Registered on
Mity CPU Platforms Developer 10/28/2010
Industrial I/O Board Developer 03/15/2011
Analog Expansion Board Developer 10/30/2012
MityDSP (TI TMS320C6xxx Based Products) Developer 10/28/2010
MityDSP-PRO Development Kit Developer 02/21/2013
MityDSP-L138 (ARM9 Based Platforms) Developer 10/28/2010
MitySOM-335x (ARM Cortex-A8 Based Products) Developer 10/26/2011
AM335X Development Kit Developer 02/28/2012
MitySOM+TiWi-BLE Manager, Developer 03/07/2013
MitySOM-335x Maker Transition Kit Developer 12/15/2016
MitySOM-5CSX Altera Cyclone V Manager, Developer 02/15/2013
MitySOM-5CSX Baseboard Developer, Reporter 04/02/2013
MitySOM-5CSX Embedded Vision Developer's Kit for Basler dart BCON Developer 07/25/2017
MitySOM-A10S Altera Arria 10 Developer 05/06/2018
MitySOM-AM57X Developer 01/27/2020
MitySOM-AM62 & MitySOM-AM62A Developer 11/01/2022
MitySOM-C10L Developer 04/04/2022
MitySOM-iMX6 Developer 04/11/2017
MityCAM Vision Cameras Developer 10/28/2010
GenTL Software Reporter 06/26/2018
MityCCD Scientific Cameras Developer 10/28/2010
Redmine Usage Developer 02/21/2012

Activity

11/02/2023

02:35 AM MitySOM-5CSX Altera Cyclone V PCB Development: RE: MSEL[4] and return current cap...
Sorry if I wasn't clear. The caps are optional. They might help in a worst case situation, but for most designs the... David Rice

11/01/2023

07:38 PM MitySOM-5CSX Altera Cyclone V PCB Development: RE: MSEL[4] and return current cap...
The intention of the caps to ground on these signals is to allow some high frequency ground currents from the SOM I/O... David Rice

07/21/2014

11:46 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: uPP receiving problem
I'm not a VHDL guy, so I can't say whether this will work as you have it. It sounds like you and your VHDL guy shoul... David Rice
11:09 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: uPP receiving problem
Each time you call receive, a DMA is set up to fill the buffer you pass. Once that DMA completes, no data will be tr... David Rice
10:05 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: uPP receiving problem
I don't see any reason that it wouldn't work, but I have seen issues with some interrupt levels not working. I stron... David Rice
09:49 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: uPP receiving problem
A couple of things that I see are different from some code that I have working here:
I use nHWInterruptLevel = 7. ...
David Rice

07/03/2014

08:29 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: uPP delay between transmissions
My first thought on seeing this is that it is probably a cache issue. After you set the values in the buffer, the va... David Rice

05/09/2014

10:24 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: DSP DMA crashes Linux
I have recently been working on a project where we ran into conflicts between QDMA's on the DSP side and MMC use on t... David Rice

02/24/2014

07:38 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: DSP- EDMA Transmission problem
Excellent! Glad it is now working!
Dave
David Rice

01/30/2014

09:31 AM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Ethernet
Greg,
Only 2 "e"s in setenv, not three... Jack probably knows that, but just to be clear...
Dave
David Rice

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