FPGA GPIO: toggle problem

Added by Michele Canepa over 11 years ago

Dear All,

after I successfully created a GPIO core on the FPGA framework, burnt onto the FPGA, successfully enumerated the FPGA cores and installed the fpga_gpio kernel object, I was trying to toggle a GPIO pin on FPGA using userspace in linux, without success.

I premit I am using the default configuration for industrial io as kernel configuration, as you recommend.
I see also a configuration called testfix, but I don't know actually what is it.

What happens is:

I see the devices in /sys/class/gpio; in my case are 4 gpio banks, number of pins are ok.
I try for example to export gpio number 146, of bank gpiochip144: so I do echo "146" to > .. /export.
After that I see the gpio146 in /sys/class/gpio.
I set the direction as "out" , echoing file direction
I cat and the direction is set correctly.
Then I try to echo value as "1".
Now, if I cat value, nothing happens: value is bonded to zero, without possibility to change this.

active_low is zero.

Is this a known issue?
Maybe it's a kernel configuration problem?

Thank you for the attention!

Regards,

Michele Canepa

Replies (7)

RE: FPGA GPIO: toggle problem - Added by Gregory Gluszek over 11 years ago

Hi Michele,

Could you post your VHDL instantiation of the GPIO core? Perhaps some of settings or ports were set incorrectly...

Thanks,
\Greg

RE: FPGA GPIO: toggle problem - Added by Michele Canepa over 11 years ago

Sure Greg, thanks for the help!
The name is IndustrialIO_top, because I worked on it from your file..

IndustrialIO_top.vhd (34.3 KB) IndustrialIO_top.vhd

RE: FPGA GPIO: toggle problem - Added by Gregory Gluszek over 11 years ago

Hi Michele,

The reason that you're not seeing the echo'ed value of the GPIO change is due to the way the core is connected. In order to solve this you will need to connect the o_io outputs of the GPIO core back to i_io. This was most likely not connected in the reference design as the GPIO core is only being used for output and it was assumed that no one would need to check the output value from software. So, most likely the GPIO is toggling as desired, but due to the way that FPGA is setup you cannot confirm this from software.

Here is a wiki page for reference on how to setup the core for the different input/output scenarios: http://support.criticallink.com/redmine/projects/arm9-platforms/wiki/The_GPIO_Core

Thanks,
\Greg

RE: FPGA GPIO: toggle problem - Added by Michele Canepa over 11 years ago

Hi Greg,
thank you for the hint and the fast answer!
Now I have another problem: I modified the GPIO instantiation as you suggested, following the wiki link you submit: in particular I followed the "GPIOs as Outputs" template.

I succesfully implemented the top module, changing all GPIO cores instantiation as you suggested.
Then I generated the .bit file, converted in .bin, and put that file on the userspace.
Now, when I try to cat the new file .bin on the FPGA, the board resets.
If I try to flash the previous file I generated, with the top .vhd I submitted, the file is accepted by the FPGA and I can enumerate cores etc.. as before.

Something has gone wrong in implementing the vhdl, I suppose. Am I correct?

Can you please have a look to a template of my new .vhd file, checking if I correctly followed your suggestions?

This one is shorter than the previous, and only contains one GPIO core.
I apologize for the length and disorder of the previous one..

Thank you very much!

Regards,
Michele Canepa

M_CANEPA_new_template.vhd (4.55 KB) M_CANEPA_new_template.vhd

RE: FPGA GPIO: toggle problem - Added by Gregory Gluszek over 11 years ago

Hi Michele,

The only time I've experienced the board reseting due to an FPGA load is when I was mistakenly loading the wrong file (i.e. I tried to cat the .bit file instead of the .bin...). If you take the file you sent me and switch the gpio i_io ports back to just being 0's does the system not reset when you load the resulting .bin file? I do not think there should be a way to create a valid FPGA .bin file that will cause the system to reset...

Sorry I do not have a better answer, but I'm rather perplexed by what you're seeing...

When you get a chance please try my suggestion and let me know what happens. Hopefully we can work from there and get you a solution.

Thanks,
\Greg

RE: FPGA GPIO: toggle problem - Added by Michael Williamson over 11 years ago

ON the bitfile generation, please make sure that your unused IOBs are "floating" and not pulled down or up.

-Mike

RE: FPGA GPIO: toggle problem - Added by Michele Canepa over 11 years ago

Dear all,

by the way, Greg was right saying that the GPIO core configuration I posted the first time could work (IndustrialIO_top file; a day ago): today I tried to reflash that file on fpga, and monitoring the outputs on the back connector of Industrial IO baseboard, I have seen the IO toggling correctly echoing value to 1, even if "value" file did not change (is bonded to zero). But the led is toggling, so I am happy.

This is good enough for me for now, even if I will try anyway next days to reimplement the new one with back-port of o_io to the i_io.

As usual, your help is invaluable!

Regards.

Michele Canepa

(1-7/7) Go to top

Project

General

Profile

Mity CPU Platforms » MityDSP-L138 (ARM9 Based Platforms)