Activity
From 06/30/2016 to 07/29/2016
07/27/2016
- JC 05:19 PM FPGA Development: RE: Communication EGD or ModBus/TCP Cores
- Good question, I'm not sure if there are any files on there that specify which version it is. But if nobody has updated it since you bought it then it will be running the older MDK filesystem.
- HB 05:06 PM FPGA Development: RE: Communication EGD or ModBus/TCP Cores
- How can I check my currently devkit MDK?
- JC 03:56 PM FPGA Development: RE: Communication EGD or ModBus/TCP Cores
- Looks like you are using the older toolchain which apparently doesn't have the rpl_* support. This post gives some possible solutions.
https://www.linuxquestions.org/questions/linux-software-2/undefined-reference-to-%60rpl_malloc'-5872... - HB 03:34 PM FPGA Development: RE: Communication EGD or ModBus/TCP Cores
- Jonathan,
I used the tarball instead of the git, I share you my log, it is different than yours, it is attached.
I can see some Errors. After this Should I be able to compile in Eclipse using the library ?
Thanks,
Hector - JC 01:43 PM FPGA Development: RE: Communication EGD or ModBus/TCP Cores
- I created a FAQ entry for future reference to building autotools based libraries.
https://support.criticallink.com/redmine/projects/arm9-platforms/wiki/ARM_Software_FAQs#Building-library-which-uses-autotools - JC 01:33 PM FPGA Development: RE: Communication EGD or ModBus/TCP Cores
- Hector Bojorquez wrote:
> I got the error in Eclipse Console messages I have not tried on the MitySOM, I tried the $file command and it looks good
> ...
This shows that the object file your trying to use was built of an intel processo... - HB 11:58 AM FPGA Development: RE: Communication EGD or ModBus/TCP Cores
- I got the error in Eclipse Console messages I have not tried on the MitySOM, I tried the $file command and it looks good
!File_Command.PNG!
I want to share you the Library installation log, it is attached, the installation created s... - JC 11:03 AM FPGA Development: RE: Communication EGD or ModBus/TCP Cores
- Where did you get this error? When running the program on the L138?
The error usually indicates the object was built for a different architecture or using a different toolchain. You can use the @file@ command to verify if it was pro... - HB 10:47 AM FPGA Development: RE: Communication EGD or ModBus/TCP Cores
- Hi,
Well I have *.so* and a *.la* file, the _dinamic library_ and the _static library used by the GNU "libtools" package._
I tried to add the libmodbus with the .so file to the linker following the wiki for adding dsplink.lib file...
07/26/2016
- AB 04:41 PM FPGA Development: RE: Communication EGD or ModBus/TCP Cores
- Hector,
Concerning the Vivado question:
At this time we do not recommend using Vivado as it does not support the Spartan 6 based devices. We recommend Xilinx ISE 14.X and frankly to begin with you can start with their free webpack ... - JC 04:22 PM FPGA Development: RE: Communication EGD or ModBus/TCP Cores
- I would have expected you to get either get a .a or .so file.
http://stackoverflow.com/a/12237595
https://stackoverflow.com/questions/8332460/how-do-i-include-a-statically-linked-library-in-my-eclipse-c-project - HB 04:16 PM FPGA Development: RE: Communication EGD or ModBus/TCP Cores
- I added the library and its path, but I did not get any .lib file after the library installation, Should I have a .lib file?
I only got some "modbus..".h files and one .pc file - JC 02:59 PM FPGA Development: RE: Communication EGD or ModBus/TCP Cores
- Hector Bojorquez wrote:
> Hi Jonathan and Alex,
> ...
Did you add the library to the linker? See the following link for how we add the dsplink.lib file. https://support.criticallink.com/redmine/projects/arm9-platforms/wiki/DSP_Hello_W... - HB 02:33 PM FPGA Development: RE: Communication EGD or ModBus/TCP Cores
- Hi Jonathan and Alex,
It is really helpful information, thank you.
I did not know about libmodbus library, now I'm trying to use it but it looks like the compiler is not linking correctly the modbus library, I added the library pat...
07/20/2016
- AB 03:21 PM FPGA Development: RE: Communication EGD or ModBus/TCP Cores
- Hector,
I spoke with Jon C. about this issue and we have a little more followup.
In the past for the MitySOM/DSP-L138 family of modules we have utilized Modbus/TCP however it was implemented on the ARM processor in Linux using the ... - JC 10:16 AM FPGA Development: RE: Communication EGD or ModBus/TCP Cores
- Hector Bojorquez wrote:
> Hi,
> ...
Most likely it is possible, though i'm only briefly aware of how Modbus works and don't know EGD.
>
> ...
Don't think we have dealt with any. A brief google search doesn't show much other than th... - Hi,
I'm a beginner with FPGA and embedded systems, now I'm creating a communication between some devices and the MitySOM1810 through EGD and ModBus/TCP communication protocols.
After this stage we are thinking about implementing th...
07/12/2016
- JC 09:02 AM Software Development: RE: SPI1 controller, access to FLASH and carrier board. NOT linux based.
- Excellent glad you got it working.
- IS 12:16 AM Software Development: RE: SPI1 controller, access to FLASH and carrier board. NOT linux based.
- Johnathan,
Joy Joy, Happy Happy.
Everything is working. There were three items altogether. First was the "open drain" on the chip select. The EE added a pull up resistor and that worked). We were able to finally capture the spi si...
07/11/2016
- FW 05:06 PM Software Development: RE: L138 dsplink problem - schedule while atomic bug
- I looked deeper into the error we were provoking on our bench; it turned out to be a c++ vector de-referencing error that was causing an invalid page fault. The error message posted above appears to be secondary fallout. I'm thinking tha...
07/09/2016
- JC 06:24 PM Software Development: RE: SPI1 controller, access to FLASH and carrier board. NOT linux based.
- Ian St. John wrote:
> Can you confirm that the signal marked as 'reserved' just beside the SPI1_CSC1 is the SPI1_CSC0 and would that show the chip select operation from reading the flash? It seems a good inference but it is speculative ... - IS 05:56 PM Software Development: RE: SPI1 controller, access to FLASH and carrier board. NOT linux based.
- Hmm. I asked the EE about the diagram and he was interested in the fact that there was a pull up on the CS line. Apparently, none of our documents state that the SPI1_SCS[1] is "open drain".
We have
"am1808 tech ref (spruh82a)".pdf... - IS 12:40 AM Software Development: RE: SPI1 controller, access to FLASH and carrier board. NOT linux based.
- The eeprom is on the i2c0 bus. I'm assuming you are talking about the SPI Nor flash which is on SPI1_CS0.+
Oops. Sorry, I said eeprom when I meant the 8MB flash. The JEDEC result is from FLASH, so ok. I modified the code to do the ... - MW 01:23 PM Software Development: RE: L138 dsplink problem - schedule while atomic bug
- Hi Fred,
Syslink is newer than DSPlink, though in the context of the L138 it's very similar code (syslink evolved from DSPlink).
I am curious about the "sudden" appearance of the error following a power cycle on your fielded unit. ... - FW 12:11 PM Software Development: RE: L138 dsplink problem - schedule while atomic bug
- The error collected above was on the bench after making some minor software changes seemingly unrelated with the code that accesses dsp-link; the one below was just found in the field. The field device was in operation for 2 months with ...
- FW 11:23 AM Software Development: RE: L138 dsplink problem - schedule while atomic bug
- I found the following on the TI site; looks like they struggled with this issue with sys-link... I'm not sure how sys-link is related to dsp-link (newer, older, ?)...
[[https://e2e.ti.com/support/embedded/tirtos/f/355/t/385081]]
07/08/2016
- I think there may be a bug in the dsplink kernel code that causes the scheduler to run after a call to spinlock. "remove_wait_queue" seems to be in atomic code, and anything that can cause a call to the scheduler is not allowed after a s...
- JC 09:33 AM Software Development: RE: SPI1 controller, access to FLASH and carrier board. NOT linux based.
- Ian St. John wrote:
> I am building and programming a custom board without Linux. Basic embedded drivers running from SPI1,CS0 (8MB NOR Flash).
> ...
The eeprom is on the i2c0 bus. I'm assuming you are talking about the SPI Nor flash...
07/05/2016
- I am building and programming a custom board without Linux. Basic embedded drivers running from SPI1,CS0 (8MB NOR Flash).
CCS version 6.1.3, compiler TI 15.15.1 LTS, custom carrier board with 1808-FX-225-RC (MityARM 1808) SOM.
I can ...