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From 12/07/2012 to 01/05/2013
12/13/2012
- 05:55 PM FPGA Development: RE: Mity-DSP Xilinx JTAG and Walking One Problem
- I am using the base model MityDSP-6711 with the XC3S400 FPGA.
By default, I tri-state/make inputs any I/O pins no... - 05:31 PM FPGA Development: RE: Mity-DSP Xilinx JTAG and Walking One Problem
- All ones sounds like the FPGA got it's program pin pulled (it was reset). Is it possible you are driving P8 to Low? ...
- I've developed a JTAG test for our mothercard that the Mity DSP plugs into. I use the Xilinx JTAG to the FPGA on the ...
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