Project

General

Profile

Activity

From 02/23/2014 to 03/24/2014

03/05/2014

10:13 AM FPGA Development: FPGA LVDS I/O standard termination
Hi,
I'm currently using the Mity-DSP pro and in my application the FPGA receive LVDS signals as inputs. The MityDS... Romain INGRASCIOTTA
 

Also available in: Atom

Go to top
Add picture from clipboard (Maximum size: 1 GB)