Activity
From 06/18/2019 to 07/17/2019
07/03/2019
- 11:04 AM FPGA Development: RE: Set timing constraints
- Hi Davide,
You really need a constraints file for this to constrain the input timing signals properly based on the... - Dear all,
I have a MitySOM 5CSX-H6-4YA with a Cyclone V SoC installed on a custom board with ADCs and DACs. What I...
07/01/2019
- 11:03 AM Software Development: RE: FPGA PIO interrupt issues with Rocko and kernel 4.9
- Hi Wesley
Thank you for the proposed code change, that did the trick!
I think @static DRIVER_ATTR(fpga_uinput, S_IR...
06/28/2019
- 03:53 PM Software Development: RE: FPGA PIO interrupt issues with Rocko and kernel 4.9
- Thanks for the log and module code.
We'd like to build this module in an attempt to recreate the issue, but the de... - 10:04 AM Software Development: RE: FPGA PIO interrupt issues with Rocko and kernel 4.9
- Hi Dan, thanks for your reply.
I did a quick test where I replaced the 4.9 (RT) zImage with 4.1.22(RT) on my rocko...
06/27/2019
- 08:21 PM Software Development: RE: FPGA PIO interrupt issues with Rocko and kernel 4.9
- Hello,
We aren't aware of any changes or issues with the PIO interrupts. We haven't been able to recreate the issu... - Hi
After upgrading to Rocko and kernel 4.9 (RT) my pio interrupt routine is no longer working. My previous setup was...
06/26/2019
- I use MitySOM-5CSX dev kit and i would like to boot to a different kernel using kexec.
In my configuration:
...
Also available in: Atom
Go to top