Mity CPU Platforms

11/05/2014

01:40 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Modular SGDMA

Hi Dan,
The issue seems to be with the polling. I brought out the empty signal to an oscilloscope and found that i... Anonymous

10/31/2014

10:44 AM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: Clock for FPGA

Hi.
I'm using MityDSP-L138F Board. As will ensure that the generated clock signal to FPGA?
Thanks Oleh Mela

10/29/2014

10:58 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: Performance problem with baremetal code

In the meanwhile and after an ARM Cortex training I've found the root cause of the problem:
For enabling the cache... Christian Kempter

10/28/2014

11:48 AM MitySOM-335x (ARM Cortex-A8 Based Products) PCB Development: RE: RTC Crystal Specifications

Theres a 24MHz crystal between XTALOUT and XTALIN on the ARM. Its frequency tolerance at 25C is +/- 25ppm.
Note th... Jonathan Cormier

11:42 AM MitySOM-335x (ARM Cortex-A8 Based Products) PCB Development: RE: RTC Crystal Specifications

Great, thank you for the information. Is it a similar specification for the other oscillator on the board, connected ... Chris Leon

11:31 AM MitySOM-335x (ARM Cortex-A8 Based Products) PCB Development: RE: RTC Crystal Specifications

For the 32khz crystal attached between the OSC32KOUT and OSC32KIN pins, according to its datasheet, the frequency tol... Jonathan Cormier

10:56 AM MitySOM-335x (ARM Cortex-A8 Based Products) PCB Development: RTC Crystal Specifications

What are the ppm drift specifications for the TPS65910 RTC crystal? Chris Leon

10/27/2014

04:10 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Communicating with an 8-bit parallel interface (GPIO, SPI or GPMC)

Updated question(s) from the customer:
I've been looking into using GPMC. The Technical Reference Manual for the A... Alexander Block

10/24/2014

10:41 AM MityDSP-L138 (ARM9 Based Platforms) PCB Development: RE: L138 SOM LEDs

Sorry,
On Non-FPGA modules:
D1 is connected to R16 (GP6_12) of the OMAP-L138.
D2 is connected to R17 (GP6_13... Michael Williamson

10:05 AM MityDSP-L138 (ARM9 Based Platforms) PCB Development: RE: L138 SOM LEDs

Hi Mike,
The SOM we are using is the non-FPGA version. What do D1 and D2 connect to?
Thanks,
Anton Anton Kitai

07:22 AM MityDSP-L138 (ARM9 Based Platforms) PCB Development: RE: L138 SOM LEDs

D1 is connected to the FPGA_DONE pin on the FPGA configuration block.
D2 is connected to P15 of the FPGA IO_L74P_A... Michael Williamson

10:03 AM MityDSP-L138 (ARM9 Based Platforms) PCB Development: RE: MityDSP-L138 Boot Problem

This issue has been resolved - we had left an uterminated SPI1_CLK signal trace on our base board at an unpopulated d... Anton Kitai

10/22/2014

03:13 PM MityDSP-L138 (ARM9 Based Platforms) PCB Development: L138 SOM LEDs

Please can you provide information for D1 and D2 LEDs on the L138-FX-225-RC module. What are they connected to?
Tha... Anton Kitai

02:05 PM MityDSP-L138 (ARM9 Based Platforms) PCB Development: MityDSP-L138 Boot Problem

We are using the L138-FX-225-RC on a new custom baseboard and are having trouble with boot:
- no UART activity in ... Anton Kitai

10/21/2014

10:28 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Communicating with an 8-bit parallel interface (GPIO, SPI or GPMC)

SPI:
I'm not sure what you mean by using the spi bus to handle the 8-bit data bus.
If you want raw access to the ... Jonathan Cormier

10:16 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Communicating with an 8-bit parallel interface (GPIO, SPI or GPMC)

As Alex mentioned the GPMC bus is used for an on-SOM nand memory. The GPMC bus allows multiple devices to use the bu... Jonathan Cormier

10/20/2014

04:55 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: Communicating with an 8-bit parallel interface (GPIO, SPI or GPMC)

Posting this on behalf of a customer:
The interface to their networking chip and other peripheral boards on their ... Alexander Block

04:34 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Modular SGDMA

Hi Dan,
I polling the FIFO empty signal for the both the dispatcher and write master to ensure that only when both... Anonymous

10/17/2014

04:53 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Modular SGDMA

Hi Jack,
You could try polling the dispatcher's busy bit instead but I'm not quite sure if that would solve your i... Daniel Vincelette

03:57 PM MitySOM-5CSX Altera Cyclone V FPGA Development: Modular SGDMA

Hi
I'm running into a difficulty with the Modular SGDMA that is used in the HPS Memory example.
I have to send ... Anonymous