Mity CPU Platforms » MitySOM-A10S Altera Arria 10

11/18/2022

02:02 PM Software Development: RE: PWM signal generation.

Thank you,
Costas Costas Hatzinikolaou

01:59 PM Software Development: RE: PWM signal generation.

Hi Costas,
Is it acceptable to just have the fan always on at max RPM? If so then a PWM isn't required and you can... Daniel Vincelette

11/15/2022

03:27 PM Software Development: PWM signal generation.

We would like to use a cooling fan on the A10 FPGA of the MitySOM-A10S.
We plan to connect the fan to the J3 connect... Costas Hatzinikolaou

11/11/2022

02:52 PM FPGA Development: RE: battery-backup.

Thank you.
Costas Costas Hatzinikolaou

02:49 PM FPGA Development: RE: battery-backup.

Hi Costas,
It does not. The MitySOM-A10S doesn't support battery backed up volatile security keys. In order to use... Daniel Vincelette

01:45 PM FPGA Development: battery-backup.

I understand the the Real Time clock is connected to the VBAT battery voltage input pin of J4 connector in the MitySO... Costas Hatzinikolaou

11/08/2022

10:27 PM FPGA Development: RE: Implementing PTP protocol with MitySOM-A10S SOM.

Thanks, Dan.
Costas
From: Daniel Vincelette <redmine@criticallink.s, Dan>
Sent: Tuesday, November 8, 2022 5:17... Costas Hatzinikolaou

10:17 PM FPGA Development: RE: Implementing PTP protocol with MitySOM-A10S SOM.

Hello Costas,
We have never used PTP on the Arria 10 but the HPS MAC does say that it supports "IEEE 1588-2002 and... Daniel Vincelette