MitySOM-A10S Altera Arria 10 SOC Wiki Page¶
- Table of contents
- MitySOM-A10S Altera Arria 10 SOC Wiki Page
- Repositories
- Architecture
- Development Kit
- Software
- FPGA / VHDL
- Hardware Design
- Reference Material
Support is included for the MitySOM-A10S. See The Critical Link website for top level summaries of this platform.
- MitySOM-A10S DataSheet [pdf]
- MitySOM-A10S Gen 1 Dev Board DataSheet [pdf]
- MitySOM-A10S Gen 2 Dev Board DataSheet [pdf]
- MitySOM-A10S Carrier Board Design Guide: Please contact Critical Link
Errata and Product Change Notifications for the MitySOM-A10S can be found in the Hardware Design section of this wiki.
Repositories¶
The following are links to the repositories that Critical Link provides for the kernel, u-boot, yocto, and sample project.
Type | Repo | Branch |
Kernel | git://support.criticallink.com/home/git/linux-socfpga.git | socfpga-6.1.55-lts |
U-Boot | git://support.criticallink.com/home/git/u-boot-socfpga.git | socfpga_v2023.07 |
Yocto Layer | git://support.criticallink.com/home/git/meta-cl-socfpga.git | kirkstone |
Quartus Example Projects (Quartus Pro 21.3) | git://support.criticallink.com/home/git/mitysom-a10s.git | 21.3pro-stable |
Architecture¶
Development Kit¶
- Development Virtual Machine
- Gen 1 vs Gen 2 Dev Board Information
- Development Board Schematics and Revision Information
Pre-Built SD Card Images¶
The following are links to pre-built binaries for the development SD card image for each SOM. Each also includes each built versions of the preloader, uboot, and root filesystem for each image.
- Quartus Pro 21.3 2024/02/05
- Quartus Pro 21.3 2023/07/14
- Quartus Pro 21.3 2021/11/11
- Quartus Pro 18.1 2020/09/29
- Quartus Pro 18.0 2019
Recommended Build Flow¶
- Prerequisites
- Building the FPGA
- Building the Bootloader(U-Boot)
- Building the Filesystem
- Building the SD Card Image
Software¶
- Boot Media
- JTAG Debug Interface
- SoM Temperature Sensor
- Building the Linux Kernel for MitySOM-A10S outside of Yocto
- Building the FreeRTOS Demo Project for MitySOM-A10S
U-Boot¶
FPGA / VHDL¶
Hardware Design¶
- Errata and Module Product Change Notifications
- Power Supply Requirements
- Mounting Hole Locations
- Heat Dissipation
- CAD Files and Information
- Dual Bottom Side Connector Information
- Customizing the On Board Silicon Labs PLLs
- MitySOM-A10S Pin-Out Spreadsheet
- RTC Information
- KSZ RGMII Phy Design Considerations
Reference Material¶
FPGA/ARM¶
- Embedded Peripherals IP User Guide
- Intel Arria 10 Hard Processor System Technical Reference Manual
- Arria 10 HPS Register Map
- Intel Arria 10 Transceiver PHY User Guide
- AN 871: Quick Guide for Intel Arria 10 and Intel Cyclone 10 GX Transceiver High-Speed Link Tuning
Software¶
Updated 8 months ago by Mike Fiorenza
Recent Updates:
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