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Building the Bootloader (U-boot) under Quartus Pro 21.3

1. Prerequisites 2. Building the FPGA Image 3. Building the Bootloader 4. Building the Filesystem 5. Building the SD Card

Introduction

The main boot loader for the MitySOM-A10S is Das U-Boot. This boot loader is used to configure the pin mux, DDR, program the FPGA, and launch the next stage application/OS. Critical Link started from Intel's port of Das U-Boot and made the following modifications:

  • Reading the MAC address from the on board EEPROM (part of the factoryconfig command)
  • Optionally programming the external PLL chips, U14 and U15, if PLL configuration file is provided

The v2021.04 version of the u-Boot, recommended for use with Quartus Pro versions greater than 19.3, transitions from a single bootloader image running in SRAM to 2 boot images. The first image is the secondary program loader (SPL), which runs in the on-board HPS SRAM. The SPL is responsible for loading the peripheral bitstream into the FPGA, configuring the HPS EMIF memory interfaces and loading the tertiary program loader, u-Boot, into DDR4 for final boot execution. The default configuration for the MitySOM-A10S is to load from the SD MMC card. However, support is included for booting from the on-board eMMC device.

These instructions have been tested with Quartus Pro 21.3

Repository

Description Repository Branch U-Boot Version
U-Boot Source https://git.criticallink.com/git/u-boot-socfpga.git socfpga_v2021.04 v2021.04

Development Kit Pre-built Outputs

Description Link
270 KLE U-boot & environment a10s-p8-bootloaders-20211111.zip
480 KLE U-boot & environment a10s-p9-bootloaders-20211111.zip

Pre-Requisites

ARM GCC Toolchain

Launch a terminal and run a NIOS2 Command Shell. Execute the following commands to download and install the ARM gcc toolchain.

cd
wget https://developer.arm.com/-/media/Files/downloads/gnu-a/10.2-2020.11/binrel/\
gcc-arm-10.2-2020.11-x86_64-arm-none-linux-gnueabihf.tar.xz
tar xf gcc-arm-10.2-2020.11-x86_64-arm-none-linux-gnueabihf.tar.xz
export PATH=`pwd`/gcc-arm-10.2-2020.11-x86_64-arm-none-linux-gnueabihf/bin:$PATH

NOTE: the last command adds the compiler to your PATH. If you launch a new shell, you will need to re-add it to your path by changing directories to your download location and re-running the last command.

Linux Packages

You will need the following packages (this list is for Ubuntu 18.04 LTS):

sudo apt-get install gawk wget git-core diffstat unzip texinfo \
gcc-multilib  build-essential chrpath socat cpio python python3 \
python3-pip python3-pexpect  xz-utils debianutils iputils-ping \
python3-git python3-jinja2 libegl1-mesa libsdl1.2-dev  pylint3 xterm \
libncurses-dev gawk flex bison openssl libssl-dev

Quick steps used reference project

The Makefile included in the development kit reference project includes a bootloader target, which will perform the steps outlined in the next section. From a NIOS2 Embedded Shell, simply run the following command at the top level directory of the reference project:

make uboot

Detailed steps to Building U-Boot

Note: Building uBoot requires a completed FPGA build directory on your host machine.

In this example, TOP_FOLDER is the top directory of your FPGA project area.

  1. Launch a terminal and run a NIOS2 Command Shell.
  2. Fetch the u-Boot source code.
    mkdir -p software/bootloader
cd software/bootloader/
git clone https://git.criticallink.com/git/u-boot-socfpga.git
cd u-boot-socfpga
git checkout -b socfpga_v2021.04 origin/socfpga_v2021.04
  3. Convert hps.xml handoff file to include file to be used by the device tree:
    cd $TOP_FOLDER/software/bootloader/u-boot-socfpga
./arch/arm/mach-socfpga/qts-filter-a10.sh \
../../../hps_isw_handoff/hps.xml \
arch/arm/dts/socfpga_mitysom_a10s_handoff.h
  4. Configure and build U-Boot and the SPL:
    cd $TOP_FOLDER/software/bootloader/u-boot-socfpga
CROSS_COMPILE=arm-none-linux-gnueabihf- make socfpga_mitysom_a10s_dsc_defconfig
make -j 48
  5. Create the FIT image with the FPGA programmimng files, used by SPL to configure the FPGA:
    cd $TOP_FOLDER/software/bootloader/u-boot-socfpga
ln -s ../../../output_files/mitysom_a10s.core.rbf .
ln -s ../../../output_files/mitysom_a10s.periph.rbf .
tools/mkimage -E -f board/cl/mitysom-a10s-dsc/fit_spl_fpga.its fit_spl_fpga.itb
  6. Create the default u-Boot environment (note: environment text file may be customized for your application)
    cd $TOP_FOLDER/software/bootloader/u-boot-socfpga
tools/mkenvimage -s 4096 -o ubootenv.bin ../ubootenv.txt

Outputs

Description Location
Bootable image, with four SPL binaries, in the format required by BootROM $TOP_FOLDER/software/bootloader/u-boot-socfpga/spl/u-boot-splx4.sfp
U-Boot image $TOP_FOLDER/software/bootloader/u-boot-socfpga/u-Boot.img
U-Boot Environment Binary $TOP_FOLDER/software/bootloader/u-boot-socfpga/ubootenv.bin

Customizing U-Boot

Customization through updating the U-boot environment

Most U-Boot customization for a carrier board can be done by adjusting the scripts/macros in the U-boot environment. This includes changing the name of the core FPGA image (RBF), Kernel, or device tree block (DTB). The U-boot environment is stored in the SD Card, 512 Bytes from the beginning of the SD Card. It can also be updated inside of U-boot by using the editenv, setenv, and saveenv commands. Please see the U-Boot documentation in Further Reading for more usages.

The U-Boot environment binary is built through the FPGA project, it's source is the ubootenv.txt

FAQ

When should I rebuild my bootloader?

Your bootloader should be rebuilt anytime the settings in the HPS block in Platform Designer is changed. This includes but not limited to: changing the HPS pin mux, changing any of the clocks generated by the HPS, enabling/changing and the FPGA bridges (Light Weight HPS-to-FPGA, HPS-to-FPGA, FPGA-to-HPS, FPGA-to-SDRAM). When in doubt rebuilt and reflash U-Boot.

Further Read

1. Prerequisites 2. Building the FPGA Image 3. Building the Bootloader 4. Building the Filesystem 5. Building the SD Card

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