Critical Link Support

11/18/2022

02:02 PM MitySOM-A10S Altera Arria 10 Software Development: RE: PWM signal generation.

Thank you,
Costas Costas Hatzinikolaou

01:59 PM MitySOM-A10S Altera Arria 10 Software Development: RE: PWM signal generation.

Hi Costas,
Is it acceptable to just have the fan always on at max RPM? If so then a PWM isn't required and you can... Daniel Vincelette

11/17/2022

01:06 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: git clone issues with linux-socfpga.git

Hi Mike,
I tried it in Ubuntu via WSL and yes, it works.
My nonworking windows command window git version is:
gi... Erkan Altan

12:00 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: git clone issues with linux-socfpga.git

Also,
I just tested running the commands listed here with the following version of git. No issues....
What ver... Michael Williamson

11:58 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: git clone issues with linux-socfpga.git

Hello,
If you are working in windows (windows command shell), you will probably have problems as the linux reposit... Michael Williamson

11:35 AM MitySOM-5CSX Altera Cyclone V Software Development: git clone issues with linux-socfpga.git

Hi, I have the issue below. After cloning, repo is unusable.
C:\prj\cl>git clone git://support.criticallink.com/h... Erkan Altan

11/15/2022

03:27 PM MitySOM-A10S Altera Arria 10 Software Development: PWM signal generation.

We would like to use a cooling fan on the A10 FPGA of the MitySOM-A10S.
We plan to connect the fan to the J3 connect... Costas Hatzinikolaou

11/14/2022

11:28 PM GenTL Software Support: RE: Python & GenTL (XML parser error)

Sorry for the delay. With the release of GenTLViewer 2.7.2, the latest harvesters 1.4.0 and genicam 1.2.0 python pac... Jonathan Cormier

11/11/2022

02:52 PM MitySOM-A10S Altera Arria 10 FPGA Development: RE: battery-backup.

Thank you.
Costas Costas Hatzinikolaou

02:49 PM MitySOM-A10S Altera Arria 10 FPGA Development: RE: battery-backup.

Hi Costas,
It does not. The MitySOM-A10S doesn't support battery backed up volatile security keys. In order to use... Daniel Vincelette

01:45 PM MitySOM-A10S Altera Arria 10 FPGA Development: battery-backup.

I understand the the Real Time clock is connected to the VBAT battery voltage input pin of J4 connector in the MitySO... Costas Hatzinikolaou

11/08/2022

10:27 PM MitySOM-A10S Altera Arria 10 FPGA Development: RE: Implementing PTP protocol with MitySOM-A10S SOM.

Thanks, Dan.
Costas
From: Daniel Vincelette <redmine@criticallink.s, Dan>
Sent: Tuesday, November 8, 2022 5:17... Costas Hatzinikolaou

10:17 PM MitySOM-A10S Altera Arria 10 FPGA Development: RE: Implementing PTP protocol with MitySOM-A10S SOM.

Hello Costas,
We have never used PTP on the Arria 10 but the HPS MAC does say that it supports "IEEE 1588-2002 and... Daniel Vincelette

11/04/2022

03:32 PM MitySOM-A10S Altera Arria 10 FPGA Development: Implementing PTP protocol with MitySOM-A10S SOM.

Hello,
Sperry would like to implement the PTP (Precision Time Protocol) protocol using the MitySOM-A10S module.
... Costas Hatzinikolaou

11/03/2022

09:41 PM MitySOM-5CSX Altera Cyclone V PCB Development: RE: Switching MitySOM modules in DevKit

Yes, the development kit is compatible with all modules in the 5CSX/5CSE family Thomas Catalino

02:27 PM MitySOM-5CSX Altera Cyclone V PCB Development: Switching MitySOM modules in DevKit

Because of availability we bough MitySOM dev kits that came with 5CSX-H6-42-RC MitySOMs. Can we use these with 5CSE-... Max Yaffe