Activity
From 06/22/2012 to 07/21/2012
07/20/2012
- MW 09:01 AM Software Development: RE: Building new openembedded-core based system from scratch
- To clarify (hopefully):
None of our software that is part of the MityDSP-L138 development kit is proprietary. The only things that we keep proprietary in our MityDSP-L138 releases are:
- FPGA VHDL source code for our "cores" (netl... - AG 05:56 AM Software Development: RE: Building new openembedded-core based system from scratch
- Hi,
I'm new to the MityDSP world, but me too, highly interested in this topic.
Could you please clarify if the proprietary bits you are talking about are somewhat related to what meta-mitydsp is supposed to provide to openembedded us...
07/13/2012
- EB 05:07 PM PCB Development: RE: MityDSP-L138F Mounting Holes (Posted on behalf of a customer)
- Hi Tom,
I hate to be a pain, but could you dimension this from the centerline of the connector, or give me a dimension from the pad 1 center to the centerline?
Different manufacturers suggest slightly different pad footprints, but ... - MW 11:37 AM Software Development: RE: DVI on Industrial I/O-Board Rev. B
- Hi Christian,
Check out the "Industrial IO Revision":http://support.criticallink.com/redmine/projects/indio/wiki/Industrial_IO_Revision_Information page for the detailed schematics and information regarding the exact configuration of... - Hi,
I got my MityDSP Devkit (Industrial I/O Board Rev. B) for around 5 weeks ago and now, as i wanna start with the Qt-StarterGuide, i saw in the LCD-Configuration-Wiki the usage of DVI Interface with the L138-Module (No FPGA) isn't p... - CR 10:56 AM Software Development: RE: How to start the u-Boot prompt?
- Thanks, Greg.
07/12/2012
- GG 03:29 PM Software Development: RE: How to start the u-Boot prompt?
- Hi Christian,
If you have a serial cable connected to your unit, when you first power it on you should see a several second count down before the unit actually starts to boot. If you press a key before the count down finishes, you wi... - Hi,
can anybody tell me, how can I get the u-Boot prompt?
What are the steps in which order to do?
Background: I wanna copy a new kernel.
Thanks,
Christian
07/10/2012
- WC 03:51 PM PCB Development: RE: MityDSP-L138F Mounting Holes (Posted on behalf of a customer)
- Thanks Tom, this is exactly what I needed.
- RD 03:27 PM Software Development: RE: GCC Toolchain and Hello World AM335x
- Hi Mike,
Got HelloWorld working correctly... thanks for helping.
I will be sure to post in the right forums from now on.
Thanks again,
Randy - MW 09:32 AM Software Development: RE: GCC Toolchain and Hello World AM335x
- Hi Randy,
This forum is for the MityDSP-L138 Family (ARM9 cores).
For the 335X, your post should go to this forum:
http://support.criticallink.com/redmine/projects/armc8-platforms/boards/28
For the MityARM-3359 SOM, you are g... - RD 09:09 AM Software Development: RE: GCC Toolchain and Hello World AM335x
- Tried based on starter guide (above was something extra I tried)
mitydsp@mitydsp-dev:~$ arm-angstrom-linux-gnueabi-gcc -v
arm-angstrom-linux-gnueabi-gcc: command not found
- I am new to Linux and Eclipse
When launching Eclipse I get:
mitydsp@mitydsp-dev:~$ eclipse
Unable to find full path for "g++"
Unable to find full path for "g++"
Unable to find full path for "arm-angstrom-linux-gnueabi-g++"
Una...
07/09/2012
- TC 04:02 PM PCB Development: RE: MityDSP-L138F Mounting Holes (Posted on behalf of a customer)
I've attached the requested drawing, does this address your needs?
Tom
- EB 08:20 AM PCB Development: RE: USB0_ID on MityARM-1810 PROFIBUS DK
- Mike,
I asked for TI tech support about this, but no reply.
In reference to my last reply:
Can you check your hardware to see if you can measure USBO_ID = high when in USB peripheral mode?
That would help me know when we've fixed it.... - YL 06:16 AM FPGA Development: RE: What‘s the configuration mode of the FPGA？
- Ok, Maybe I see.
FPGA's pin CCLK is the configuration clock , but it has two modes , namely Continuous data loading and Non-continuous data loading.
Maybe you choose the later one, right?
I originally think that the FPGA CCLK need onl...
07/06/2012
- I’m designing a carrier board to host the MityDSP-L138F and would like to use the plated through holes at the edge of the module to solidly mount it to my carrier board. I know the location of the plated through holes relative to the mod...
- MW 07:52 AM FPGA Development: RE: What‘s the configuration mode of the FPGA？
The EMA_WE (B9) pin of the OMAP-L138 is connected to the CCLK (R15) pin on the FPGA for slave select configuration. The WE pin is used during the EMIFA write cycle as a controlled clock to drive the FPGA CCLK during configuration whil...
07/05/2012
- YL 11:40 PM FPGA Development: RE: What‘s the configuration mode of the FPGA？
- Hello Mike，
I still have a question. I found out in the MityDSP-L138F Carrier Board Design Guide that you connected the pin EMA_WE/GP3[11] of L138 to CCLK pin of FPGA. But the FPGA configuration document suggests DSP's CLOCK pin conn... - GG 05:12 PM Software Development: RE: Using RMII with MityDSPL138 and L138F.
- Hi Michele,
I've worked on a project using the RMII before, and as far as I remember we needed to select the correct interface as described in the link Tim provided, and we also needed an FPGA build to route some of the RMII signals.... - EB 02:10 PM PCB Development: RE: USB0_ID on MityARM-1810 PROFIBUS DK
- FYI Mike,
Our cable is a A to mini-B and pins 4&5 are not shorted.
USB0_ID is always low regardless of cable presence.
The AM1808 SPRS653C 2.7.17 says that USB0_ID is an analog input w/o a pullup.
They don't say that it needs an ... - TE 01:10 PM PCB Development: RE: USB0_ID on MityARM-1810 PROFIBUS DK
- Mike,
I am working with Emmett on the software side. I have ported the usb_dev_bulk example into the UART example, removing the LCD calls because I do not have a display attached. I am calling the USBDBulkInit(0, (tUSBDBulkDevice *)... - MW 12:44 PM PCB Development: RE: USB0_ID on MityARM-1810 PROFIBUS DK
- Hello Mr. Bradford,
1. There is no pullup on the MityARM-1810F SOC for the USB0_ID pin (though there is likely one in the AM1810 itself, not sure of the default configuration off hand).
2. There is no connection to the FPGA for any... - We are using MityARM-1810F on the PROFIBUS DK board.
We are trying to use the TI starterware examples to get USB0 to act as a peripheral.
The USB0_ID is always low regardless of the cable attach.
1. Is there a pullup on the MityARM-...
07/04/2012
- MC 09:29 AM Software Development: RE: Using RMII with MityDSPL138 and L138F.
- Hi Tim,
thanks for the link.
I will try that way.
Thank you very much.
Best Regards,
Michele Canepa
- TI 09:23 AM Software Development: RE: Using RMII with MityDSPL138 and L138F.
- Michele,
We have used the RMII configuration on a job. I do not recall any issues (our "experts" on this subject are currently on vac). There is a wiki page ( http://support.criticallink.com/redmine/projects/arm9-platforms/wiki/Network_... - Hello Sirs,
I'm evaluating the possibility to use the RMII interface instead of MII in order to interface the MityDSP Card with a RMII compatible ethernet PHY, on a custom motherboard.
This option is useful for me because of pin mux ...
07/01/2012
- DG 10:35 PM Software Development: RE: Debug problem
- Hello Mike!
I am using a VM from the Critical Link's DVD (MDK 2011/03/31, arm-angstrom-linux ver. 2010.7-test-20101118)
My problem is solved by adding links as in wiki's "GDB dependency hassles", but like this:
sudo ln -s /usr/lib/lib... - MW 12:11 PM Software Development: RE: Debug problem
- Hi,
Which version of the toolchain / VM are you using?
Did you install on your own linux build machine or are you using a VM provided by Critical Link?
-Mike
06/30/2012
- Hello!
I am trying to establish debug session in accordance with wiki's Debugging ARM Apps with Eclipse.
As it said, I have got a library error message "/usr/local/angstrom/arm/bin/arm-angstrom-linux-gnueabi-gdb: error while loading sh...
06/29/2012
- TI 07:12 AM Software Development: RE: chip clocking
- Stéphane
The input clock on the L138 is indeed 24MHz. The max CPU speed on the L138F is actually 456MHz.
I will have the marketing folk look into correcting the table in the overview document.
sorry for any confusion.
cheers
/Tim - Hello,
How fast is the input clock of the omapl138 on the MityDSP-L138F?
Due to the MityDSP family overview, where the CPU speed is given with 450MHz, I assume a 25MHz input clock (instead of a 24MHz one on TIs EVM-Board).
Is this c...
06/26/2012
- YL 09:34 PM FPGA Development: RE: What‘s the configuration mode of the FPGA？
- Thanks very much.
- MW 08:58 AM FPGA Development: RE: What‘s the configuration mode of the FPGA？
- Hello Mr. Lu,
The FPGA is configured using 8 bit parallel slave select mode via the EMIFA bus connection to the Omap L138 processor. The wiki has a section about programming the device using either uBoot or Linux drivers. While unc... - TC 10:29 AM Software Development: RE: KSZ8995MA Ethernet Switch Support
- Charlie -
Thanks for the update, great news!
Tom - CK 09:48 AM Software Development: RE: KSZ8995MA Ethernet Switch Support
- Mike
I have finally got the switch to work. The last problem was that I had set the CONF0-CONF2 bits to 0x110, which sets MAC 5 to MAC operation. I have now set it to PHY (0b101) and I can now connect to the network.
Thanks for all...
06/25/2012
- Hello,
We are using the MityDsp-L138F board. I want to know the FPGA's configuration mode on the board, is it MASTER SPI,BPI or slave SPI ,BPI? We can find nothing about pin M0&M1 of FPGA in the datasheets.
Anybody can tell me?
...