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From 01/08/2017 to 02/06/2017

01/31/2017

AB 06:48 PM PCB Development: RE: FPGA CLOCK LOCATION
Alex,
Thank you for reaching out to us about this question.
On our MitySOM-L138F family modules we have the EMIF bus from the OMAP-L138 connected to the Xilinx Spartan 6 FPGA to allow for communications of cores between the process...
Alexander Block

01/30/2017

JA 01:28 PM PCB Development: FPGA CLOCK LOCATION
Hello good day I developing a new project in ISE WEBPACK using the PROFIBUS DEVELOPMENT KIT with the MitySOM-1810F Processor Card.
I am programming the FPGA and this is my entity:
PORT(
*CLK50* : IN STD_LOGIC;
RX : IN STD_LOG...
Jesus Alejandro Alvarez Trejo

01/23/2017

JA 10:59 AM Software Development: RE: Programming the FPGA - Loading via CPU
Hello, good day
I load the FPGA with "Example loading the .bin file over the serial port using Kermit" because it was easier but I will continue trying with TFTP server.
U-Boot > loadb 0xC0700000
## Ready for binary (kermit) ...
Jesus Alejandro Alvarez Trejo
MW 06:58 AM Software Development: RE: SATA link down
Are you using SATA-II or SATA-III link speeds? I believe the Errata from TI still applies. Michael Williamson

01/22/2017

FX 10:37 PM Software Development: RE: SATA link down
hello ,I have the same problem !
Can you tell me this problem is Finish or not?
fang XIAO

01/20/2017

JC 01:51 PM Software Development: RE: Programming the FPGA - Loading via CPU - "ERROR LOADING"
Jesus Alejandro Alvarez Trejo wrote:
> Hello, Good Day
> ...
Your ping command was run while booted into linux. You should run it while in u-boot to prove you have network communication working.
>
> ...
What tftp server are you usi...
Jonathan Cormier
JA 12:51 PM Software Development: RE: Programming the FPGA - Loading via CPU - "ERROR LOADING"
Hello, Good Day
I am trying to load the FPGA using https://support.criticallink.com/redmine/projects/arm9-platforms/wiki/Programming_the_FPGA vía CPU, I already created the .bin file to do the first test. I am using the ...
Jesus Alejandro Alvarez Trejo

01/12/2017

JC 02:41 PM Software Development: RE: Programming the FPGA - Loading via CPU
I don't understand the difference between this question and your last question. https://support.criticallink.com/redmine/boards/10/topics/5138
The programming guide from which you grabbed the above paragraph, includes the two ways tha...
Jonathan Cormier
JA 12:45 PM Software Development: Programming the FPGA - Loading via CPU
Hi, Good Day, I am trying to load the FPGA via CPU, but I would like to know: How can I configure the slave select mode in the FPGA?. I read the Xilinx Spartan-6 configuration guide, but it is not enough clear.
"The FPGA has been con...
Jesus Alejandro Alvarez Trejo
JA 11:15 AM FPGA Development: Communication between AM1810 ARM Microprocessor For PROFIBUS and Spartan 6
Hello, Good Day, I have the MitySOM-1810F PROFIBUS Development kit which includes the AM1810 ARM Microprocessor For PROFIBUS and Spartan 6, I would like to know how I can communicate both devices, I mean, what kind of protocol and how im... Jesus Alejandro Alvarez Trejo
MW 11:08 AM Software Development: RE: Programming the FPGA
Take a look at the [[Programming the FPGA]] for information about programming the FPGA. The wiki page on this web site has a bunch of information to get started.
If you want to program with JTAG via a Xilinx emulator pod, you can do ...
Michael Williamson
JA 11:05 AM Software Development: Programming the FPGA
Hello, Good Day, I have the MitySOM-1810F PROFIBUS Development kit, I am starting to use it and I do not know how load the FPGA, I would like to know if I need a special connector or if I could use other method to load the FPGA. Jesus Alejandro Alvarez Trejo
 

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