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From 01/19/2017 to 02/17/2017

02/17/2017

02:00 PM FPGA Development: RE: Problems building the Kernel
Your right I can't find the u-boot-tools archive anymore.
Luckily the mkimage tool is built by u-boot. So it can b...
Jonathan Cormier
01:39 PM FPGA Development: RE: Problems building the Kernel
Hi Jonathan,
We followed the instructions in the link, but we continue having problems to get the U-boot-tools pa...
Hector Bojorquez
12:34 PM FPGA Development: RE: Problems building the Kernel
We are working on releasing new versions of the VM. In the mean time you can change the repos so they point to the "... Jonathan Cormier
12:32 PM FPGA Development: Problems building the Kernel
Hi all,
I´m trying to do the "FPGA GPIO Core Example":https://support.criticallink.com/redmine/projects/arm9-platf...
Hector Bojorquez

02/15/2017

10:28 AM FPGA Development: MitySOM-1810F PROFIBUS Development kit: Programming uart.ngc file in FPGA Spartan 6.
Hello, good day,
I am working with the MitySOM-1810F PROFIBUS Development kit which includes the AM1810 ARM Microp...
Jesus Alejandro Alvarez Trejo

02/14/2017

09:24 AM PCB Development: RE: FPGA CLOCK LOCATION
Hello, Good day
Thank you for the answer, I have been working only with the FPGA without using the EMIF interface ...
Jesus Alejandro Alvarez Trejo

01/31/2017

06:48 PM PCB Development: RE: FPGA CLOCK LOCATION
Alex,
Thank you for reaching out to us about this question.
On our MitySOM-L138F family modules we have the EMI...
Alexander Block

01/30/2017

01:28 PM PCB Development: FPGA CLOCK LOCATION
Hello good day I developing a new project in ISE WEBPACK using the PROFIBUS DEVELOPMENT KIT with the MitySOM-1810F Pr... Jesus Alejandro Alvarez Trejo

01/23/2017

10:59 AM Software Development: RE: Programming the FPGA - Loading via CPU
Hello, good day
I load the FPGA with "Example loading the .bin file over the serial port using Kermit" because ...
Jesus Alejandro Alvarez Trejo
06:58 AM Software Development: RE: SATA link down
Are you using SATA-II or SATA-III link speeds? I believe the Errata from TI still applies. Michael Williamson

01/22/2017

10:37 PM Software Development: RE: SATA link down
hello ,I have the same problem !
Can you tell me this problem is Finish or not?
fang XIAO

01/20/2017

01:51 PM Software Development: RE: Programming the FPGA - Loading via CPU - "ERROR LOADING"
Jesus Alejandro Alvarez Trejo wrote:
> Hello, Good Day
>
> I am trying to load the FPGA using https://support.cr...
Jonathan Cormier
12:51 PM Software Development: RE: Programming the FPGA - Loading via CPU - "ERROR LOADING"
Hello, Good Day
I am trying to load the FPGA using https://support.criticallink.com/redmine/projects/arm9-platfo...
Jesus Alejandro Alvarez Trejo
 

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