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From 04/05/2012 to 05/04/2012

04/25/2012

03:27 PM FPGA Development: RE: JTAG adapter cable question
Hi Bob,
We don't offer those through our distributors directly at the moment, they are only part of the Devkit BOM...
Michael Williamson
12:49 PM FPGA Development: JTAG adapter cable question
Where can I buy the adapter cable which goes from the MityDSP-Pro JTAG connector to the TI Debugger?
This is a 14-pi...
Bob Clarke

04/10/2012

03:14 PM Software Development: MityDSP boot loader source code
Is this source code available for me to find examples of how the various DSP configuration registers are set?
At t...
Peter Faill
12:35 PM Software Development: RE: Does MityGUI run on Windows XP SP3?
I tried it here and have the same problem also.
Please use 4.0.5 for now and we'll look into this.
Dave
Pete...
Dave Stehlik
11:34 AM Software Development: RE: Does MityGUI run on Windows XP SP3?
Should have mentioned that I ran version 4.0.6 (just downloaded from 'Files').
Peter
Peter Faill
11:09 AM Software Development: Does MityGUI run on Windows XP SP3?
I've run it on a Windows7 machine without any trouble.
But when I run in on a XP machine I get the attached error ...
Peter Faill

04/09/2012

06:52 PM Software Development: RE: MityDSP: dual port memory within FPGA
Thanks for the quick reply,
Peter
Peter Faill
06:51 PM Software Development: RE: MityDSP: dual port memory within FPGA
If you are referring to the bootloader image, then I think you have it.
Address lines are 1-to-1.
-Mike
Michael Williamson
06:28 PM Software Development: MityDSP: dual port memory within FPGA
Hi,
I'd like to test the DSP <=> FPGA bus interface by writing to a FPGA scratch address and then reading back the...
Peter Faill

04/06/2012

02:59 PM FPGA Development: RE: MityDSP DSP/FPGA pinouts information request
Pretty much, all of the connections between the FPGA and internal connections on the module are captured in the c:\mi... Michael Williamson
02:31 PM FPGA Development: MityDSP DSP/FPGA pinouts information request
I'm starting to implement our own FPGA design on the MityDSP. The pinout mappings between the FPGA and DSP would be ... Peter Faill

04/05/2012

08:04 PM Software Development: RE: emulator initialization from CCSV5.1
Glad to hear that you're moving forward, let us know if you need any additional support.
Tom
Thomas Catalino
 

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