Mity CPU Platforms » MitySOM-5CSX Altera Cyclone V

07/15/2014

06:28 PM Software Development: RE: Pre production (-X) modules with newer sd image

Well, the orange LED switches OFF because with this new version of the SD card, the FPGA is loaded with a firmware at... Pierre-Yves BRETECHER

07/11/2014

09:34 AM Software Development: RE: Building u-Boot and Preloader

I believe that the files in question need to be copied from software/spl_bsp/generated into u-boot-socfpga/board/cl/m... Nigel Doe

07/10/2014

02:23 PM Software Development: RE: Breaking changes on early MityARM

Should have spotted that note but somehow managed to miss it!
Thanks,
Nigel. Nigel Doe

02:00 PM Software Development: RE: Breaking changes on early MityARM

Hello Nigel,
Sorry about that. The description of the hardware changes for the Dev Kit baseboard are here:
htt... Michael Williamson

01:49 PM Software Development: Breaking changes on early MityARM

I have an early MityARM module and dev kit. On trying to implement the latest software versions I found that the Ethe... Nigel Doe

08:42 AM Software Development: Building u-Boot and Preloader

I am just revisiting the development kit after working on other projects and I am trying to locate the copy_files.sh ... Nigel Doe

07/08/2014

12:17 PM Software Development: Pre production (-X) modules with newer sd image

Hi,
I'am just starting to discover the eval kit. The one I ordered from Mouser was a pre-prod (- X) version. I und... Pierre-Yves BRETECHER

07/07/2014

07:22 AM Software Development: Sample c program to read/write Cyclone V FPGA internal memory through hps2fpga bridge

Hi,
Do you have sample c/c++ program to read/write a memory inside Cyclone V FPGA through hps2fpga bridge interfac... Bill Lee

07/03/2014

05:14 PM FPGA Development: RE: How to access FPGA internal memory through AXI slave interface protocol

Hi Bill,
Sorry for the confusion. The latest image updated the Baud Rate to 115.2kbps to be consistent with the r... Adam Dziedzic

05:05 PM FPGA Development: RE: How to access FPGA internal memory through AXI slave interface protocol

Hi,
I downloaded the sd_image_mitysom_5csx_rev1B.zip, and extracted out the .bin file. Then I typed "sudo dd if=sd... Bill Lee

07/02/2014

09:27 PM FPGA Development: RE: How to access FPGA internal memory through AXI slave interface protocol

Information on how to make an SD card based upon the current Development Kit SD card image (Rev 1B) can be found on t... Alexander Block

06:17 PM FPGA Development: RE: How to access FPGA internal memory through AXI slave interface protocol

Mike,
I think you meant "memtool -32 0xFFD0501C=0x06" for brgmodrst register. The reset value of the register some... Bill Lee

08:52 AM FPGA Development: RE: How to access FPGA internal memory through AXI slave interface protocol

For reference on the reset register:
http://www.altera.com/literature/hb/cyclone-v/hps.html#reg_default_component/... Michael Williamson

08:51 AM FPGA Development: RE: How to access FPGA internal memory through AXI slave interface protocol

Hi Bill,
It looks like you are using version 3.8 of the kernel. Version 3.8 does not have the FPGA bridge drivers... Michael Williamson

06/27/2014

09:52 PM FPGA Development: RE: How to access FPGA internal memory through AXI slave interface protocol

Hi Mike,
I attached 2 files as you indicated in your previous reply. One is boot.log and another one is foo.txt.
... Bill Lee

07:56 AM FPGA Development: RE: How to access FPGA internal memory through AXI slave interface protocol

If you can't see the enable file then the driver for the device isn't compiled in or the device tree blob doesn't ins... Michael Williamson

06/26/2014

10:46 PM FPGA Development: RE: How to access FPGA internal memory through AXI slave interface protocol

Thanks for your reply.
I am currently intend to use hps2fpga bridge only in my design. And I just copy the generat... Bill Lee

08:12 AM FPGA Development: RE: How to access FPGA internal memory through AXI slave interface protocol

Which AXI crossbar interface are you using? The hps2fpga bridge or the lightweight bridge? Did you make a new prelo... Michael Williamson

01:00 PM Software Development: UART RS232

Hi,
Could you point to some examples for UART RS232 communication?
Thanks,
Jack Anonymous

06/25/2014

10:43 PM FPGA Development: How to access FPGA internal memory through AXI slave interface protocol

Hi,
I have implemented a logic and loaded into cyclone V FPGA. Before that, I did run simulation to access a memor... Bill Lee

06/20/2014

08:45 AM Software Development: RE: Using custom DTS in yocto flow

Right now, the kernel recipe that gets used for our dev kit is indeed in the meta-mitysom-5csx/recipes-kernel/linux f... Michael Williamson

06/18/2014

05:23 PM Software Development: Using custom DTS in yocto flow

Posting on behalf of a customer and for future reference as well:
How do you get yocto to use a custom dts instead... Daniel Vincelette

06/17/2014

11:04 AM Software Development: RE: I2C Access with 5CSX Development Board

1) i2cset and i2cget are pretty standard tools, do you need help installing them or do you not want them on your fina... Michael Williamson