Mity CPU Platforms » MitySOM-5CSX Altera Cyclone V

10/02/2014

12:53 PM FPGA Development: RE: HPS Memory Controller

Hi,
Just raising this subject again. I'm going through the document for the sgdma_dispatcher, but do you guys have... Anonymous

10/01/2014

02:27 PM Software Development: RE: Port 22222

Actually, the issue seems to be with the third party software.
So don't worry about it. Anonymous

02:07 PM Software Development: RE: Port 22222

Furthermore, ssh works to it.
We have a python program that tries to connect to the board via port 22222, but it r... Anonymous

01:58 PM Software Development: RE: Port 22222

Hi Bob,
The only file I changed is the interface file in the /etc/network folder to give the system a static addre... Anonymous

01:44 PM Software Development: RE: Port 22222

Jack, I'm assuming you are running the "third party software" on the PC, correct?
If so, how did you configure t... Bob Duke

01:19 PM Software Development: Port 22222

Hi,
We are trying to have a third party software to connect to the board via Port 22222. We assigned a static addr... Anonymous

09/30/2014

12:41 PM Software Development: RE: Static IP Adderess

Hi Dan,
That works! Thank you!
Jack Anonymous

09:26 AM Software Development: RE: Static IP Adderess

Hello Jack,
Is your PC a windows machine? If so I believe if you have the firewall on then it will block any ping ... Daniel Vincelette

09/29/2014

06:54 PM Software Development: Static IP Adderess

Hi,
I tried to set a static IP address to the system, by changing the /etc/network/interface file (See below). Bec... Anonymous

09/17/2014

02:36 PM Software Development: RE: Standard USB peripheral connection on MitySOM eval Board

Hi,
I'm now quite stuck without the ability to use use the host mode.
I have noticed on Rocketboards something ... Pierre-Yves BRETECHER

11:29 AM FPGA Development: RE: Load FPGA Timeout Error

Max,
Thank you for posting that.
You are correct that if VBAT is too low the module will either not boot at all... Alexander Block

10:41 AM FPGA Development: RE: Load FPGA Timeout Error

Hi Dan,
I had similar problem last week. After two week I tried to run my development board loading the FPGA with ... Massimo Buratto

09/11/2014

06:34 PM Software Development: RE: U-Boot with large uImage containing initramfs

Hi Nicholas,
A little confused. Your build_ramdisk_image.sh appears to be building a 1 GB image for loading an SD... Michael Williamson