Activity

From 02/16/2015 to 03/17/2015

11:06 AM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: FPGA serial programming interface: We are happy to provide further assistance with this issue, however I will be contacting you directly at your e-mail ... Alexander Block

10:23 AM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: FPGA serial programming interface: Thanks for the information.
We are prototyping a future product and due to pin count restrictions we can't use par... stephan berner
10:18 AM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: FPGA serial programming interface: I discussed this with one of our engineers here and it may be possible however they is likely a bit of work required ... Alexander Block
08:32 AM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: FPGA serial programming interface: SB,
I apologize.
The M0 and M1 FPGA pins are tied to resistors on the module to GND (M0) and 3.3V (M1) forcing... Alexander Block

05:04 PM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: FPGA serial programming interface: I understand that. However, I would like to configure the FPGA in serial slave mode. stephan berner
05:01 PM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: FPGA serial programming interface: SB,
The FPGA is configured using 8 bit parallel slave select mode via the EMIFA bus connection to the Omap L138 pr... Alexander Block
03:36 PM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: FPGA serial programming interface: hi,
are the pins CCLK, DIN and the MODE pins available on the OMAP-138 as GPIOs, or are they open/hardcoded on the... stephan berner

08:05 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: U-boot not bringing Linux kernel up correctly: So this commit in u-Boot must also be accompanied by a patch in the kernel that is present in the 3.10LTS, 3.16 and h... Michael Williamson

05:20 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Write to SharedMem from DSP and read it from ARM: Thanks for the cache info. Completely missed that part.
I reverted to the original code, and I've added BCACHE_wb(... Frank C

06:44 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Very high TX packet loss on gigabit Ethernet: Hi Mike,
I don't think those pins are associated with an IO bank. In the pin planner the default setting for those ... Chris Weinman
06:24 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Very high TX packet loss on gigabit Ethernet: Hi Chris,
Can you expand a bit? Do you mean the IO bank voltage settings were not correct?
-Mike
Michael Williamson
05:58 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Very high TX packet loss on gigabit Ethernet: Hi Mike,
I/O parameters turned out to be the problem. They were set to their default values (higher than they shoul... Chris Weinman

04:47 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: MAX3100 (SPI to UART bridge) driver not working: Bindu,
You can look at how the other baseboard_spi0_slave_info have the irq filled in. Its possible that simply n... Jonathan Cormier
04:44 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: MAX3100 (SPI to UART bridge) driver not working: Jonathan,
Thank you for the answer; using the following helped with respect to creating the /dev/ttyMAX0:... Bindu Jagannatha
09:50 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: MAX3100 (SPI to UART bridge) driver not working: The init driver gets called when the driver is added to the kernel. If its built in then this happens early on, if i... Jonathan Cormier

06:50 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: MAX3100 (SPI to UART bridge) driver not working: Hello,
We are trying to compile the driver for MAX3100 and we are unable to get the node /dev/ttyMAX in spite of t... Zhe Ji

10:48 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: MDK_2012-08-10 default configuration: There also may be a small time penalty in having the kernel search for the phy. But this would need to be quantified ... Jonathan Cormier
10:46 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: MDK_2012-08-10 default configuration: I believe the phy address was set in an earlier version of the kernel and it was carried forward. There is also the ... Jonathan Cormier
09:52 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: MDK_2012-08-10 default configuration: Thanks Mike for answer.
I did not look at section 2.2 of TLK100PHP datasheet. It is my fault.
I read section "3... François Tremblay
09:18 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: MDK_2012-08-10 default configuration: Hi François,
In the datasheet for the TLK100PHP, Section 2.2 shows that the PHYAD0 pin has an internal pull-up, wh... Michael Williamson
07:33 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: MDK_2012-08-10 default configuration: I look at U-boot code and it doesn't explain what we are seeing.
When resetting the PHY device, only GPIO5[15] is ... François Tremblay

04:59 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: MDK_2012-08-10 default configuration: Thanks Jonathan to told me that I am not alone with that questioning.
The first revision of our custom board had a... François Tremblay
04:43 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: MDK_2012-08-10 default configuration: François,
I too was confused about this but was unable to determine why the phy id becomes 0x03.
I checked th... Jonathan Cormier
04:21 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: MDK_2012-08-10 default configuration: Mike,
My reply is out of date but it is about that topic: PHY address configuration.
You said that PHY address ... François Tremblay
03:59 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Write to SharedMem from DSP and read it from ARM: Pretty sure you have to flush the DSP cache after changing values. Jonathan Cormier
03:48 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Write to SharedMem from DSP and read it from ARM: Hi,
I am trying to get the shared memory working as well (by writing from DSP side and reading back from ARM side)... Frank C

11:41 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Alter Ethernet MAC: Thanks Jonathan, that's exactly what I was after. Mostafa Afgani
11:41 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Alter Ethernet MAC: You might also try this technique, though I am not sure if the current version of the 3.2 kernel has this command lin... Michael Williamson
11:26 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Alter Ethernet MAC: Mostafa,
We store the mac address on a eeprom on the SoM. The settings stored on this can be accessed using the f... Jonathan Cormier
11:01 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: Alter Ethernet MAC: Hi, is it possible to alter the 'burned-in' MAC address of an L138F? I know that I can change it using 'ifconfig eth0... Mostafa Afgani

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