Activity
From 03/06/2015 to 04/04/2015
04/03/2015
- 01:24 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: USB port data lock ups
- Hi Jeffrey,
What version of the kernel are you running? Can you provide us the output to the command 'uname -a'? ... - We're having an issue with data going to the USB ports on our AM3352 SOMs. We're using an FTDI FT240XS USB to 8-bit F...
03/26/2015
- 11:21 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Pull-up Enable for MityDSP L138 (cp[0])
- To be more specific, @CP[0]@ covers the following pins: @GP0[8] (OMAP_GP0_8), GP0[9] (OMAP_GP0_9), AHCLKX (AUDIO_SYS...
03/25/2015
- 10:57 AM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: Mity L138F FPGA -> OMAP interrupt lines
- Hi Alex,
I was using MDK_2012-03-12 and in the included UCF the IO standard on those pin was different:
NET "o_... - I'm trying to get a new hardware design up and running with the MityDSP L138, using the Industrial IO board as a star...
03/23/2015
- 05:08 PM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: Mity L138F FPGA -> OMAP interrupt lines
- Chris,
Hopefully you happened upon this on your own but the details for the pin-configuration, voltage standards, ...
03/12/2015
- 11:06 AM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: FPGA serial programming interface
- We are happy to provide further assistance with this issue, however I will be contacting you directly at your e-mail ...
03/11/2015
- 10:23 AM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: FPGA serial programming interface
- Thanks for the information.
We are prototyping a future product and due to pin count restrictions we can't use par... - 10:18 AM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: FPGA serial programming interface
- I discussed this with one of our engineers here and it may be possible however they is likely a bit of work required ...
- 08:32 AM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: FPGA serial programming interface
- SB,
I apologize.
The M0 and M1 FPGA pins are tied to resistors on the module to GND (M0) and 3.3V (M1) forcing...
03/10/2015
- 05:04 PM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: FPGA serial programming interface
- I understand that. However, I would like to configure the FPGA in serial slave mode.
- 05:01 PM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: FPGA serial programming interface
- SB,
The FPGA is configured using 8 bit parallel slave select mode via the EMIFA bus connection to the Omap L138 pr... - hi,
are the pins CCLK, DIN and the MODE pins available on the OMAP-138 as GPIOs, or are they open/hardcoded on the...
03/06/2015
- 08:05 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: U-boot not bringing Linux kernel up correctly
- So this commit in u-Boot must also be accompanied by a patch in the kernel that is present in the 3.10LTS, 3.16 and h...
Also available in: Atom
Go to top