Project

General

Profile

Configuring MityDSP for 256MB DRAM

Added by Tom Riddle almost 3 years ago

Hi,

We have a L138-FI-236-RL, which should have 256MB of DRAM. U-boot is reporting DRAM : 128MB. The bootargs pass mem=96M which makes sense since all of the MDK examples (using 2014-01-03) have the DSP configured with 32MB. My guess it that UBL needs to be rebuilt to support this larger memory size, we do know that linux hangs on boot you pass a larger mem size then 128MB to the kernel via boot args.

Is there a pre-built UBL for the 256MB support? Also is this the latest source??

2010-05-01 UBLandFLashUtils_2010_10_26.tgz Release Notes

Thanks, Tom


Replies (10)

RE: Configuring MityDSP for 256MB DRAM - Added by Michael Williamson almost 3 years ago

There is a custom version of the UBL that queries the local I2C factory PROM to get the part number and sets up the DRAM accordingly. I believe the source code for that UBL is provided in the MDK. Is that what you are using?

RE: Configuring MityDSP for 256MB DRAM - Added by Tom Riddle almost 3 years ago

Hi Michael,

So now I do see in the UBL device.c, in the 2014 MDK, support for 256MB sizes. I assume I'll have to built and install that
per the instructions on

https://support.criticallink.com/redmine/projects/arm9-platforms/wiki/User_Boot_Loader

BTW, I did just get the 2010-05-01 UBL project imported to CCS6.2, assume this should work in the 2014 MDK

So thanks, looks like I'm pointed in the right direction now. Tom

RE: Configuring MityDSP for 256MB DRAM - Added by Tom Riddle almost 3 years ago

Hi,

I went as far as I could and ran into this problem. Imported the project file UBL_SPI_MEM.pjt with the CCS6.2 tool, which I'm not a total expert on. Everything compiled but it's failing as follows: Not sure what to do next... any insights appreciated, Thanks, Tom

---------------- snip ----------------
'Building target: ../SPI_MEM/UBL_SPI_MEM.out'
'Invoking: ARM Linker'
"D:/rrt/ti/ccsv6/tools/compiler/arm_15.12.3.LTS/bin/armcl" --cmd_file="../devtype.txt" -mv5e --code_state=32 -me -O3 -g --define="USE_IN_ROM" --define="UBL_SPI_MEM" --define=omapl138 --diag_wrap=off --display_error_number --abi=eabi --asm_directory="../SPI_MEM" --obj_directory="../SPI_MEM" -z -m"../SPI_MEM/UBL_SPI_MEM.map" --stack_size=0x800 --heap_size=0x800 -i"F:/rurisond/mitydsp/workspace/UBL_SPI_MEM" -i"F:/rurisond/mitydsp/OMAP-L138_FlashAndBootUtils_2_27/OMAP-L138/CCS/UBL_ARM" -i"D:/rrt/ti/ccsv6/tools/compiler/arm_15.12.3.LTS/lib" -i"D:/rrt/ti/ccsv6/tools/compiler/arm_15.12.3.LTS/include" --reread_libs --display_error_number --warn_sections --diag_wrap=off --xml_link_info="UBL_SPI_MEM_linkInfo.xml" --retain="*(.selfcopy)" --rom_model --fill_value=0xFF -o "../SPI_MEM/UBL_SPI_MEM.out" "F:/rurisond/mitydsp/workspace/UBL_SPI_MEM/SPI_MEM/boot.obj" "F:/rurisond/mitydsp/workspace/UBL_SPI_MEM/SPI_MEM/debug.obj" "F:/rurisond/mitydsp/workspace/UBL_SPI_MEM/SPI_MEM/device.obj" "F:/rurisond/mitydsp/workspace/UBL_SPI_MEM/SPI_MEM/device_spi.obj" "F:/rurisond/mitydsp/workspace/UBL_SPI_MEM/SPI_MEM/device_uart.obj" "F:/rurisond/mitydsp/workspace/UBL_SPI_MEM/SPI_MEM/i2c.obj" "F:/rurisond/mitydsp/workspace/UBL_SPI_MEM/SPI_MEM/spi.obj" "F:/rurisond/mitydsp/workspace/UBL_SPI_MEM/SPI_MEM/spi_mem.obj" "F:/rurisond/mitydsp/workspace/UBL_SPI_MEM/SPI_MEM/spi_memboot.obj" "F:/rurisond/mitydsp/workspace/UBL_SPI_MEM/SPI_MEM/uart.obj" "F:/rurisond/mitydsp/workspace/UBL_SPI_MEM/SPI_MEM/uartboot.obj" "F:/rurisond/mitydsp/workspace/UBL_SPI_MEM/SPI_MEM/ubl.obj" "F:/rurisond/mitydsp/workspace/UBL_SPI_MEM/SPI_MEM/util.obj"
"../OMAPL138.cmd" "../UBL.cmd" -llibc.a
<Linking>
"../UBL.cmd", line 19: error #10264: UBL_TEXT memory range overlaps existing memory range SHRAM
"../UBL.cmd", line 20: error #10264: UBL_DATA memory range overlaps existing memory range SHRAM
"../UBL.cmd", line 22: error #10264: UBL_BSS memory range overlaps existing memory range SHRAM
"../UBL.cmd", line 23: error #10264: UBL_STACK memory range overlaps existing memory range SHRAM
"../UBL.cmd", line 24: error #10264: UBL_DRAM memory range overlaps existing memory range DDR2
warning #10063-D: entry-point symbol other than "_c_int00" specified: "boot"
error #10010: errors encountered during linking; "../SPI_MEM/UBL_SPI_MEM.out" not built
gmake1: * [../SPI_MEM/UBL_SPI_MEM.out] Error 1
gmake1: Target 'main-build' not remade because of errors.
gmake: *
[all] Error 2

Compilation failure

makefile:158: recipe for target '../SPI_MEM/UBL_SPI_MEM.out' failed
makefile:150: recipe for target 'all' failed


  • Here is the UBL.cmd file

-e boot

IRAMStart = 0x80000000;
IRAMSize = 0x00008000;
DRAMStart = 0x80000000;
DRAMSize = 0x00008000;

ASYNC_MEM_START = 0x62000000;

INTERNAL_RAM_START = 0x80000000;
INTERNAL_RAM_SIZE = 0x00008000;

STACK_START = INTERNAL_RAM_START + INTERNAL_RAM_SIZE;

MEMORY {
ARM_I_IVT (RX) : origin = 0xFFFFD000 length = 0x00000020

UBL_TEXT        (RWX) : origin = 0x80000000   length = 0x00006800
UBL_DATA (RWX) : origin = 0x80006800 length = 0x00000800
UBL_BSS         (RW)  : origin = 0x80007000   length = 0x00000800
UBL_STACK (RW) : origin = 0x80007800 length = 0x00000800
UBL_DRAM (RWX) : origin = 0xC0000000 length = 0x10000000
}

SECTIONS {

.text :
{
*(.boot)
. = align(4);
*(.text)
. = align(4);
} > UBL_TEXT
.data :
{
*(.const)
} > UBL_DATA
.bss :
{
*(.bss)
. = align(4);
} > UBL_BSS
.ddr_mem :
{
. += 0x10000000;
} run = UBL_DRAM, type=DSECT, RUN_START(EXTERNAL_RAM_START), RUN_END(EXTERNAL_RAM_END), SIZE(EXTERNAL_RAM_SIZE)
.stack :
{
.+=0x0400;
} run = UBL_STACK, type=DSECT, SIZE(STACK_SIZE)

}

RE: Configuring MityDSP for 256MB DRAM - Added by Jonathan Cormier almost 3 years ago

I would expect that the precompiled UBL_SPI_MEM.ais file in MDK/images would have the 256MB DRAM support.

Updating_devkit_to_latest_MDK

RE: Configuring MityDSP for 256MB DRAM - Added by Tom Riddle almost 3 years ago

Hi Jonathan,

Thanks, I'll give it a try, however I did brick the board early on and had to reflash UBL and u-boot. Dunno maybe I grabbed the older 2010 UBL version at that time.

Regs, Tom

RE: Configuring MityDSP for 256MB DRAM - Added by Michael Williamson almost 3 years ago

So the patch to support 256 MB modules was introduced in our codebase 7/14/2011. We need to update the UBL wiki page to refer to the AIS images and code in the later MDKs for 256 MB modules.

I am sorry for the confusion.

If you program the later prebuild AIS modules and still have a problem let me know. It's possible the factor PROM may somehow not be correct.

Has this problem been present since you received the module from Critical Link?

-Mike

RE: Configuring MityDSP for 256MB DRAM - Added by Tom Riddle almost 3 years ago

Hi,

So I used the files in the /images dir of the MDK 2014 and successfully programmed the board. However UBL continues to detect 128MB DRAM, the UBL version does list Jul 11, 2011.

Well I honestly can't recall what the board originally came with since I bricked it early on and had to reprogram it.

Regs, Tom =======================

E:\release_2014\images>dir
Volume in drive E has no label.
Volume Serial Number is 6CDE-FFDB

Directory of E:\release_2014\images

09/29/2017 09:43 AM <DIR> .
09/29/2017 09:43 AM <DIR> ..
01/13/2014 09:06 AM 2,530,232 uImage
01/13/2014 09:16 AM 254,672 u-boot-ubl.bin
01/13/2014 08:47 AM 8,396 UBL_SPI_MEM.ais
01/13/2014 09:16 AM 254,652 u-boot.bin
09/29/2017 09:43 AM <DIR> modules
01/13/2014 08:47 AM 250,868 SPIWriter_MityDSP-L138.out
01/13/2014 08:47 AM 241,664 sfh_OMAP-L138.exe

OMAP-L138/AM-1808/AM-1810 initialization passed!
Configuring 256MB mDDR
Booting TI User Boot Loader
UBL Version: 1.65:2.28.1 Built Jul 11 2011 12:49:53
UBL Flashtype: SPI
Starting SPI Memory Copy...
Valid magicnum, 0x55424CBB, found at offset 0x00010000.
DONE
Jumping to entry point at 0xC1080000.

U-Boot 2009.11 (Jan 13 2014 - 11:14:02)

I2C: ready
DRAM: 128 MB
NAND: 512 MiB
MMC: davinci: 0
In: serial
Out: serial
Err: serial
ARM Clock : 300000000 Hz
DDR Clock : 150000000 Hz
EMIFA CLock : 100000000 Hz
DSP Clock : 300000000 Hz
ASYNC3 Clock : 150000000 Hz
Enet config : 2
MMC 0 Enable : 1
Resetting ethernet phy
Net: Ethernet PHY: GENERIC @ 0x03 [0x8]

Hit any key to stop autoboot: 1

RE: Configuring MityDSP for 256MB DRAM - Added by Tom Riddle almost 3 years ago

Oh wait I see 256MB from UBL... sorry its u-boot that is reporting 128MB, my bad

RE: Configuring MityDSP for 256MB DRAM - Added by Michael Williamson almost 3 years ago

UBoot reports 128 MB,but you should be able to address 256 MB in uboot as well as the kernel. You may need to pass it a mem=256M for it to address it.

-Mike

RE: Configuring MityDSP for 256MB DRAM - Added by Tom Riddle almost 3 years ago

Hi, Just a FYI, since 32MB was allocated for the DSP, passing mem=224MB in bootargs seems to work now. Thanks, Tom

    (1-10/10)
    Add picture from clipboard (Maximum size: 500 MB)