Project

General

Profile

Using FPGA cores and library

Added by Bill Dickson about 10 years ago

Do you have a big-picture document describing how to use the multiple FPGA "cores" in the "hardware\boot" folder and/or the mcs files in the "\hardware\FPGA_boot" folder and the pinouts they assume at the MityDSP-Pro (C6455) connector? Would that be in "Day 1" of the MityDSP Training slides that is not posted yet?

Thank you, Bill


Replies (1)

RE: Using FPGA cores and library - Added by Michael Williamson about 10 years ago

Hi Bill,

In short, the hardware\fpga\build_spartan3 folder contains netlists of "cores" (IP functional blocks with a corresponding C++ API in the DspCore.lib library in the MDK) that will "plug-in" to the EMIFA Interface and base_module vhdl framework, much like the UART is hooked up in the bootloader FPGA module. The FPGA_boot folder is really just a copy of the default FPGA image that comes out of a "stock" factory unit.

The Day 1 slides do have some more information on that, but I need to sanitize them a bit before I can publish them. I will try to do that tomorrow AM. Sorry for the delay.

-Mike

    (1-1/1)
    Go to top
    Add picture from clipboard (Maximum size: 600 MB)