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Additional Address Lines EA[19 downto 10] pin loc

Added by Leon Craven about 8 years ago

Hi,

In the supplied ucf files I can only find pin information for address lines i_emif_aea[9 downto 0]. I would like to use the other address lines. Are they routed to the FPGA? If so what are their pin locations on the FPGA.

Regards,

Leon


Replies (4)

RE: Additional Address Lines EA[19 downto 10] pin loc - Added by Michael Williamson about 8 years ago

Hi Leon,

While module are you using? Do you have a model number or a part number?

-Mike

RE: Additional Address Lines EA[19 downto 10] pin loc - Added by Leon Craven about 8 years ago

Hi,

Sorry, I'm using the MityDSP-Pro, 6455-JE-3X5-R.

Cheers,

Leon

RE: Additional Address Lines EA[19 downto 10] pin loc - Added by Michael Williamson about 8 years ago

Hi Leon,

Here are the rest of the EMIF_AEA pin assignments.

-Mike

NET FPGA PIN FPGA BANK
EMIF_AEA10 AA9 5
EMIF_AEA11 AC11 5
EMIF_AEA12 AE12 5
EMIF_AEA13 AC10 5
EMIF_AEA14 AB10 5
EMIF_AEA15 AB9 5
EMIF_AEA16 AC7 5
EMIF_AEA17 AE5 5
EMIF_AEA18 AD6 5
EMIF_AEA19 AA10 5
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