Activity
From 03/15/2014 to 04/13/2014
04/12/2014
- 02:43 PM FPGA Development: RE: Broken i_ema_a<8>
- Lukasz,
I have found the RMA request e-mail you have mentioned and have replied to that e-mail accordingly.
Tha... - 12:58 PM FPGA Development: RE: Broken i_ema_a<8>
- I have more questions about RMA procedure.
The company send an e-mail to orders@criticallink.com with a question a...
04/11/2014
- 06:51 PM Software Development: RE: Not able to update opkg on MityDSP-L138
- Hello Nick,
Please try replacing the URLs in the configuration files located in /etc/opkg/ to use feeds.angstrom-d... - 03:52 PM Software Development: RE: Not able to update opkg on MityDSP-L138
- Sorry for the delay.
We are confirming the status of the Angstrom OPKG feeds and are working on providing guidanc... - 04:27 PM Software Development: RE: Error while connecting to ARM9
- The issue of debugging the ARM is that you cannot use CCS JTAG / the emulator when the Linux OS's memory manager is r...
- 03:47 PM Software Development: RE: MityDSP-L138 CCS 5.5 XDS510
- Update after phone call with customer:
1) Created a new project that was able to run a "Hello World" sample applic... - 11:52 AM Software Development: RE: How to add ifplugd to Busybox
- Mary, it should be exit 0 at the end of the script, as that indicates successful completion, so the fix you made is O...
- 10:57 AM Software Development: RE: How to add ifplugd to Busybox
- I added the -sn options in the ifplugd.conf to see debugging messages and found that ifplugd was exiting due to a non...
- 09:46 AM Software Development: RE: How to add ifplugd to Busybox
- Sorry about the delay ... other problems to work on, but I finally got back to this.
I copied the files from your ...
04/10/2014
- 12:19 PM Software Development: RE: DSPLink library sources
- Thank you very much. That will do
Best regards - 12:01 PM Software Development: RE: DSPLink library sources
- All the dsplink source code should be in the 3rdparty folder of the BSP/MDK.
-Mike
- Hello,
I have a question. Is there any way I could access the source code of DSPLink libraries on DSP side ? Are the...
04/09/2014
- 06:31 PM Software Development: RE: DSP- EDMA Transmission problem
- Hello again,
Thank you very much for help. For the time being it looks like I will be able to make do with the tcDs... - I am not able to update opkg on MityDSP due to 404 error on angstrom-distribution.org. Where can I get the update?
- Hi, I am working with the MityDSP-L138-FI-236-RL target and could use some help to get our XDS510 debugger configured...
- 06:30 AM Software Development: RE: spi1 usage in a custom board
- Hello,
Yes, for the 3.2 kernel provided, you need to create (or modify) a baseboard file as you have suggested. I... - 04:09 AM Software Development: RE: spi1 usage in a custom board
- Maybe I was not clear...
I do not want to modify uboot. It works good for me as it is.
I would like to configur...
04/08/2014
- 01:01 PM Software Development: RE: spi1 usage in a custom board
- If they only need to be configured on bootup it might be easier to do it from u-boot. You could try enabling the spi...
- Hi everybody.
I am a newby in Linux development. I have my custom board based on MityDSP138F with two ICs attached...
04/07/2014
- 12:00 PM Software Development: RE: Net: No ETH PHY detected!!!
- I used the serial flashing program to erase the memory before flashing u-boot again and this time phy eth is detected...
- Hello,
I have a mitydspl138 board. I accidentally overwrote some of the u-boot memory. I used the serial programme... - 07:43 AM FPGA Development: RE: UPP Sample Code needed
- For the FPGA interface, you could take a look at the "Vision Framework Design FIles":https://support.criticallink.com...
- 07:39 AM Software Development: RE: DSP- EDMA Transmission problem
- Hello Mr. Krawczyk,
You can interface with the UPP directly as you have described and by looking through the TRM, ...
04/03/2014
- 09:35 AM Software Development: RE: DSP- EDMA Transmission problem
- Hello Mike,
The UPP seems to be an optimal solution. However, It looks like configuring the UPP is a bit complex. I ... - Hi everyone,
I need a sample FPGA code for UPP(Supported by Critical Link) with it's UCF file(including timing const...
04/01/2014
- 05:23 PM Software Development: RE: DSP- EDMA Transmission problem
- Actually,
I was going to suggest transferring to IRAM, or if you need to transfer to DDR, doing a chained transfer... - 04:53 PM Software Development: RE: DSP- EDMA Transmission problem
- To be more precise,
Is there any way to change the EDMA3 configuration to reduce transfer time ? I want to transfer ...
03/31/2014
- 05:20 AM Software Development: RE: DSP- EDMA Transmission problem
- Hello again,
I am writing because I have the following problem:
I succesfully transfer the data, but the transfer t...
03/26/2014
- 03:16 PM Software Development: RE: DSP- EDMA Transmission problem
- Solved !
You can use the IRAM section. It is disabled as cache in the current configuration .tcf file.
Best regards
03/24/2014
- 09:57 AM Software Development: RE: GEL-file for MityDSP-L138F
- Yes. By default, the core should be 1.2V on power up.
-Mike
- Hi,
that gel-file need to use for mitydsp-L138F with 1.2 V Core?
Thanks
03/23/2014
- 08:05 PM FPGA Development: RE: Manage LX16 and LX45 at runtime
- Thanks a lot Mike!
As usual, your support is impressive!
Ticket close.
-François - 05:18 PM FPGA Development: RE: Manage LX16 and LX45 at runtime
- The model number for the part should be readable in the factory configuration information in the I2C prom. The model...
- We have a product based on MityDSP-L138F using either LX16 and LX45 fpga cores.
Q1) Can we detect which FPGA core ...
03/19/2014
- Hello everyone,
I have a MityARM 1808F and I am facing a strange issue which is as follows:
* when I am trying to c...
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