Activity
From 11/26/2017 to 12/25/2017
12/21/2017
- Hi,
I have a custom board with
1) MityDspl-138F module (with FPGA)
2) No Ethernet port
3) UART,USB,SD CARD interface
4) We are using ADC5560 and DAC5672, reference is taken from Analog Expansion Board.
ADC and DAC both operat...
12/12/2017
- JC 11:13 PM FPGA Development: RE: Core Creation Guidelines
- Jorden Luke wrote:
> I am trying to get some help with this one as well. Is there are up date to this one?
It doesn't look like we ever created that guide. I'd recommend looking at the provided source files as examples.
examples/... - JL 06:52 PM FPGA Development: RE: Core Creation Guidelines
- I am trying to get some help with this one as well. Is there are up date to this one?
12/11/2017
- JC 05:01 PM Software Development: RE: Loading kernel to SPI flash and Root file system .jffs2 to NAND.
- Vivek Ponnani wrote:
> My queries are as below
> ...
Looks fine.
>
> ...
You'd want to extract the MDK filesystem, update the files and then generate the jffs2 image file. NOTE: We also generate a new tarball which we can archive o... - Hi,
I have a custom board with
1) MityDspl-138F module (with FPGA)
2) No Ethernet port
3) UART,USB,SD CARD interface
we have done following steps till date.
1) I have built VM with MityDSP Critical_Link_Unified_VM_14-04_04-2...
12/01/2017
- JC 02:22 PM Software Development: RE: I
- Okan Çalış wrote:
> I apologize for the awkward subject; it was meant to be _"Interrupts Between Linux and DSP without BIOS"_, but it looks like I can't modify it.
Fixed your title. Unfortunately I don't know about the Linux/DSP int... - OÇ 10:57 AM Software Development: RE: I
- I apologize for the awkward subject; it was meant to be _"Interrupts Between Linux and DSP without BIOS"_, but it looks like I can't modify it.
- Hi,
I've been working on a MityDsp-L138F with Linux Ångström.
I'm able to use the 128-KB shared RAM for inter-processor communication between the two cores, with ARM running Linux and DSP running baremetal. I want to send interrupt...
11/29/2017
- TR 10:06 PM FPGA Development: RE: Alternate GPIO Control
- Greq, good point WRT the inouts... thanks for bringing it up. In our case they were going to be dedicated outputs. Either way it's great that CL supplies those cores, no doubt they will be utilized. Regs, Tom
- GG 09:39 PM FPGA Development: RE: Alternate GPIO Control
- Hi Tom,
One concern I have regarding your proposed approach would be the case of your GPIOs needing to be run-time configured as inputs or outputs. Configuring your FPGA passthrough ports to be inouts may be sufficient, but you may a... - Hi,
Direct GPIO control from the L138 is pretty nice to have. In our current task we need a number of GPIOs, more then what is available on the expansion connections when considering the other L138 functions we are using. The ability... - JC 02:28 PM Software Development: RE: How to activate splash screen
- Note you can load the fpga from u-boot. https://support.criticallink.com/redmine/projects/arm9-platforms/wiki/Programming_the_FPGA#Using-u-Boot-to-load-the-FPGA
- JC 02:27 PM Software Development: RE: How to activate splash screen
- The LCD requires the fpga to be programmed if your using a L138 with fpga. Perhaps that's whats holding the LCD off until end of boot.
- AH 06:28 AM Software Development: RE: How to activate splash screen
- I found out that the psplash service in /lib/systemd/system is not available. so i make a psplash.service script
11/28/2017
- TR 10:36 PM PCB Development: RE: Supplying an external PCB
- Alex Thanks... that's helpful. Regs, Tom
- AB 10:11 PM PCB Development: RE: Supplying an external PCB
- Tom,
We have used these (https://www.digikey.com/products/en?keywords=87759-5050) on a couple of our expansion boards for the Industrial IO board. Note that they are surface mount headers.
I believe these (https://www.digikey.com/... - TR 08:05 PM PCB Development: RE: Supplying an external PCB
- Hi, One additional question. The Industrial I/O dev kit doc mentions the Expansion IO Interface mating connectors is 2x25, 2mm header. Do you have a suggested vendor/part number you've used in the past... something that Digikey/Mouser wo...
- TR 07:43 PM PCB Development: RE: Supplying an external PCB
- excellent thanks...
- JC 06:24 PM PCB Development: RE: Supplying an external PCB
+5V supply Pins 1,2 on J104
"TPS5430":http://www.ti.com/lit/ds/symlink/tps5430.pdf 3A continuous
Note: 3A at 5V is 15W. There is a 1.1A fuse on the 12V side, which will limit this to 13.2 W. Or 2.64 A @ 5V so 2.5A to be safe...
...- Hi, We're going to be running a few development boards off of the MityDSP L138. For one we plan to use the +12VF from J701. The other it would be nice to use either the +3,3 or 5.0v supplies from TPS5430 buck converters directly. Since w...
- TR 07:42 PM Software Development: RE: creating a new rootfilesystem
- Jonathan... thanks for the clarification, that helps. Regs, Tom
- JC 06:05 PM Software Development: RE: creating a new rootfilesystem
- Tom Riddle wrote:
> So during this task I familiarized myself again (it has been a few years) with the yocto dev process, but did run into issues WRT the host system build of yocto, python versions, etc... Greg mentioned the meta laye... - TR 05:53 PM Software Development: RE: creating a new rootfilesystem
- Hi, I was able to get pulseaudio going with opkg and could stream as required over the network. Thanks for the assistance.
So during this task I familiarized myself again (it has been a few years) with the yocto dev process, but did r... - JC 02:40 PM Software Development: RE: How to activate splash screen
- On the MDK 2014 filesystem, psplash is started first thing during rcS. I don't have my dev kit setup for a display right now so can't test that.
- Hi everyone,
I found psplash in the root file system and currently able to modify the screen.
However, I can't activate it in the boot process. Can you please provide some hint how to do it?
regards,