Activity

From 11/12/2025 to 12/11/2025

02:54 PM FPGA Development: RE: Ethernet PHY configuration and SSH access: Hi Atef,
You should be able to do this via ethtool:... Daniel Vincelette
02:50 PM FPGA Development: RE: Ethernet PHY configuration and SSH access: Hi Zach,
Could you please generate a Linux image for the 5CSX-H6-4YA based on the Linux image available at the fol... Anonymous FPGA developer
10:25 AM FPGA Development: RE: Ethernet PHY configuration and SSH access: Hello,
For layout, the two groups you have outlined in your schematic snippet should be matched in length and id... Michael Williamson
08:47 AM FPGA Development: RE: Ethernet PHY configuration and SSH access: Hi Zach,
Just a quick update on my side.
I am now able to communicate over Ethernet with our custom carrier board... Anonymous FPGA developer
08:15 AM FPGA Development: RE: Ethernet PHY configuration and SSH access: Hi Zach,
Thank you for your reply.
I ran ethtool eth0 | grep PHYAD on my system, and it confirms that the PHY is de... Anonymous FPGA developer

05:40 PM FPGA Development: RE: Ethernet PHY configuration and SSH access: Hi Atef,
The image you downloaded should have an SSH server (OpenSSH) running by default, yes. @ps@ by default doe... Zachary Miller
03:52 PM FPGA Development: Ethernet PHY configuration and SSH access: Hello,
I am working with a MitySOM-5CSx module on my own custom carrier board and I am seeing different behavior dep... Anonymous FPGA developer

12:47 PM FPGA Development: RE: Issue booting encrypted bitstream on MitySOM-5CSx evaluation board: Thanks, it works. Anonymous FPGA developer

04:20 PM FPGA Development: RE: Issue booting encrypted bitstream on MitySOM-5CSx evaluation board: Atef,
Can you make sure you have the MSEL set appropriately per the table below?
!image.png! Mike Fiorenza
03:40 PM FPGA Development: Issue booting encrypted bitstream on MitySOM-5CSx evaluation board: Hello,
I am trying to test bitstream encryption on a MitySOM-5CSx evaluation board and I am running into an issue du... Anonymous FPGA developer

03:57 PM FPGA Development: RE: Using the design security for MitySOM-5CSX: Hello,
I would like to encrypt the FPGA bitstream on the MitySOM-5CSX. I have been referring to Intel’s application ... Anonymous FPGA developer

12:43 PM FPGA Development: RE: Building the MitySOM-5CSX: Seth,
I got the GPIO pin on the FPGA side to work as you described. This is just as good as having an LED because t... John Iannuzzi

08:59 PM FPGA Development: RE: Clarification regarding LED 4 on MitySOM-5CSX DevKit: Atef,
Okay that makes sense! In that case, I would look into Arm Developer Studio then. You should be able to obta... Mike Fiorenza
08:50 PM FPGA Development: RE: Clarification regarding LED 4 on MitySOM-5CSX DevKit: Mike,
Thank you for your response, I’ll have a look at it.
I was focusing on using JTAG because I’m having an issue... Anonymous FPGA developer
04:03 PM FPGA Development: RE: Clarification regarding LED 4 on MitySOM-5CSX DevKit: Atef,
If you see our Wiki page here: https://support.criticallink.com/redmine/projects/mityarm-5cs/wiki we post fu... Mike Fiorenza
03:50 PM FPGA Development: RE: Clarification regarding LED 4 on MitySOM-5CSX DevKit: Mike, Thanks for your response. Yes, I was trying to load the compiled C code binary directly to the HPS via JTAG. Si... Anonymous FPGA developer
03:42 PM FPGA Development: RE: Clarification regarding LED 4 on MitySOM-5CSX DevKit: Atef,
Glad to hear you resolved your JTAG issue. Can you elaborate on how you are trying to load the HPS portion? ... Mike Fiorenza
10:31 AM FPGA Development: RE: Clarification regarding LED 4 on MitySOM-5CSX DevKit: Thank you Mike, the system works by reversing the USB Blaster connection. I have another question please: Do you have... Anonymous FPGA developer

04:23 PM FPGA Development: RE: Clarification regarding LED 4 on MitySOM-5CSX DevKit: Atef,
From your picture, it looks like you have the JTAG pod plugged in backwards. Pin 1 on your ribbon cable does... Mike Fiorenza
04:13 PM FPGA Development: JTAG programming issue on MitySOM-5CSX DevKit with Quartus (Windows 11): Hello,
I’m trying to program a MitySOM-5CSX board via JTAG using Quartus on Windows 11, but I encounter an error im... Anonymous FPGA developer

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