Activity
From 11/16/2025 to 12/15/2025
12/09/2025
- 02:54 PM FPGA Development: RE: Ethernet PHY configuration and SSH access
- Hi Atef,
You should be able to do this via ethtool:... - 02:50 PM FPGA Development: RE: Ethernet PHY configuration and SSH access
- Hi Zach,
Could you please generate a Linux image for the 5CSX-H6-4YA based on the Linux image available at the fol... - 10:25 AM FPGA Development: RE: Ethernet PHY configuration and SSH access
- Hello,
For layout, the two groups you have outlined in your schematic snippet should be matched in length and id... - 08:47 AM FPGA Development: RE: Ethernet PHY configuration and SSH access
- Hi Zach,
Just a quick update on my side.
I am now able to communicate over Ethernet with our custom carrier board... - 08:15 AM FPGA Development: RE: Ethernet PHY configuration and SSH access
- Hi Zach,
Thank you for your reply.
I ran ethtool eth0 | grep PHYAD on my system, and it confirms that the PHY is de...
12/08/2025
- 05:40 PM FPGA Development: RE: Ethernet PHY configuration and SSH access
- Hi Atef,
The image you downloaded should have an SSH server (OpenSSH) running by default, yes. @ps@ by default doe... - Hello,
I am working with a MitySOM-5CSx module on my own custom carrier board and I am seeing different behavior dep...
12/02/2025
- 12:47 PM FPGA Development: RE: Issue booting encrypted bitstream on MitySOM-5CSx evaluation board
- Thanks, it works.
12/01/2025
- 04:20 PM FPGA Development: RE: Issue booting encrypted bitstream on MitySOM-5CSx evaluation board
- Atef,
Can you make sure you have the MSEL set appropriately per the table below?
!image.png! - Hello,
I am trying to test bitstream encryption on a MitySOM-5CSx evaluation board and I am running into an issue du...
11/28/2025
- 03:57 PM FPGA Development: RE: Using the design security for MitySOM-5CSX
- Hello,
I would like to encrypt the FPGA bitstream on the MitySOM-5CSX. I have been referring to Intel’s application ...
11/19/2025
- 12:43 PM FPGA Development: RE: Building the MitySOM-5CSX
- Seth,
I got the GPIO pin on the FPGA side to work as you described. This is just as good as having an LED because t...
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