Project

General

Profile

Activity

From 12/04/2011 to 01/02/2012

12/28/2011

08:20 AM MityDSP (TI TMS320C6xxx Based Products) PCB Development: RE: FPGA/DSP Interface Details & external interrupts
Doug -
I will let the technical team answer the question about the external interrupts. However, we will add info...
Thomas Catalino
08:16 AM MityDSP (TI TMS320C6xxx Based Products) PCB Development: FPGA/DSP Interface Details & external interrupts
(Posted on behalf of a customer)
I am working on designing the carrier interface board for the MityDSP Pro module....
Thomas Catalino

12/23/2011

09:45 AM MityDSP (TI TMS320C6xxx Based Products) PCB Development: RE: MityDSP-Pro FPGA questions ...
> In the directory labeled “C:\MityDSP\2.10\hardware\FPGA_boot” I see several sub directories that appear to have pre... Michael Williamson

12/22/2011

11:53 AM MityDSP (TI TMS320C6xxx Based Products) PCB Development: RE: MityDSP-Pro FPGA questions ...
(from Anthony)
Michael,

Thanks for the response. From what you describe it seems that the signals I intend to...
Thomas Catalino

12/21/2011

07:16 PM MityDSP (TI TMS320C6xxx Based Products) PCB Development: RE: MityDSP-Pro FPGA questions ...
Hi Tom / Anthony,
I hope this doesn't muddy the waters, but here is some more information: There are actually 3 E...
Michael Williamson
01:01 PM MityDSP (TI TMS320C6xxx Based Products) PCB Development: RE: MityDSP-Pro FPGA questions ...
??From the schematics it appears that the evaluation board is connected to both RJ-45 connectors, one goes to the 10/... Thomas Catalino
11:04 AM MityDSP (TI TMS320C6xxx Based Products) PCB Development: RE: MityDSP-Pro FPGA questions ...
Hello Tom,
I will try posting this to the support forum as well but I need to clear up some confusion Kevin and I ...
Anthony Medina

12/20/2011

12:11 PM ARM9 Based QNX Platforms Software Development: RE: SPI clock polarity
It looks like the spi driver does not do anything with the SPI_MODE_CKPOL_HIGH flag you are trying to use.
I haven...
John Pruitt
12:09 PM ARM9 Based QNX Platforms Software Development: SPI clock polarity
Question received outside of Redmine:
I am trying to interface a SPI device to the MightDSP board. The clock requ...
John Pruitt

12/15/2011

02:35 PM MityDSP (TI TMS320C6xxx Based Products) PCB Development: RE: MityDSP-Pro FPGA questions ...
The bootloader FPGA image included in the file mention provides a basic UART at pins 14 and 16 of the edge connector ... Michael Williamson

12/14/2011

06:13 PM MityDSP (TI TMS320C6xxx Based Products) PCB Development: MityDSP-Pro FPGA questions ...
(posted on behalf of a customer)
RS232_TXD SO-DIMM pin 14
RS232_RXD SO-DIMM pin 16

F...
Thomas Catalino

12/09/2011

08:57 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Using the EMIFA interface on the Mitydsp-1810
We changed chip select to CS4 and kept having the same issues. We've done some other measurements and tests and we no... Mattias Ekstrom
07:39 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Using the EMIFA interface on the Mitydsp-1810
Hi Mattias,
The only chip select used on the EMIFA by default is CS3 (used for the NAND). Our FPGA driver framewo...
Michael Williamson
03:58 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Using the EMIFA interface on the Mitydsp-1810
Hi,
I was wondering which chip selects are unused by default? What I can see in the u-boot and linux source is tha...
Mattias Ekstrom

12/07/2011

04:37 PM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: FPGA load causes reboot
Mike,
Your .bin file loaded up fine. I had the designer look at the build, and he had some IO not constrained corec...
Scott Whitney
09:38 AM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: FPGA load causes reboot
Scott,
My suspicion is that the pins tied to the EMIFA (a chip select line, a wait line, or perhaps the data lines...
Michael Williamson

12/06/2011

03:43 PM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: FPGA load causes reboot
Mike,
The arm is idle when it dies. I will post some captured text. It looks like it can't access the flash memory...
Scott Whitney
03:27 PM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: FPGA load causes reboot
Can you post what the ARM console sees when it crashes? You are downloading via JTAG, correct?
Is the ARM running...
Michael Williamson
03:15 PM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: FPGA load causes reboot
Mike,
I had our fpga designer rebuild our smaller (uPP interface) build that we were running the lx16 and retarget i...
Scott Whitney
01:14 PM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: FPGA load causes reboot
Mike,
Thanks for the quick reply. this is the only lx45 board in house now. I think we are expecting a few more to...
Scott Whitney
01:04 PM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: FPGA load causes reboot
Hi Scott,
Have you confirmed your image works on other MityDSP-L138F with lx56 FPGA modules or is this a new FPGA ...
Michael Williamson
12:58 PM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: FPGA load causes reboot
Hello,
We just got a new mityDSP l138 with the lx45 FPGA. When I try downloading my fpga build via jtag it fails. ...
Scott Whitney
 

Also available in: Atom

Go to top
Add picture from clipboard (Maximum size: 1 GB)