Activity
From 12/12/2011 to 01/10/2012
01/10/2012
- 08:09 AM MityDSP (TI TMS320C6xxx Based Products) Software Development: RE: Builds and SYS/BIOS questions ...
- Hi,
In order to actually get the DSP running at 1200 MHz, you will need a macro update to <core/DspMacros.h> to su... - 08:05 AM MityDSP (TI TMS320C6xxx Based Products) Software Development: RE: FPGA Interrupts on MityDSP-Pro
- There are 2 lines connected between the FPGA and the DSP intended for interrupt use. On the DSP, 2 GPIO pins are use...
- 07:16 AM MityDSP (TI TMS320C6xxx Based Products) Software Development: RE: SYS/BIOS Version 6.x on the MityDSP-Pro
- We have not ported the MDK libraries from DSP/BIOS 5 to SYS/BIOS 6 primarily because the C level code is largely comm...
01/09/2012
- (posted on behalf of a customer)
I am trying to get some documentation on the FPGA/DSP interrupts for the MityDSP-...
01/06/2012
- (posted on behalf of a customer)
I had some early errors regarding -mv64+. I was not aware that the c6455 is a "C6... - (posted on behalf of a customer)
Can I use the new "SYS/BIOS" (version 6.x??) with the c6455? I would like to star... - 08:18 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: remaining DSPLINK_DPC_x processes after running the HelloWorldDSP example
- Hello Stéphane,
Obligatory disclaimer: The DSPLINK code is really TI's, we just include it with our BSP because ou... - Hi,
When I execute the DSP HelloWorld example provided in topic http://support.criticallink.com/redmine/boards/10/...
12/28/2011
- 08:20 AM MityDSP (TI TMS320C6xxx Based Products) PCB Development: RE: FPGA/DSP Interface Details & external interrupts
- Doug -
I will let the technical team answer the question about the external interrupts. However, we will add info... - (Posted on behalf of a customer)
I am working on designing the carrier interface board for the MityDSP Pro module....
12/23/2011
- 09:45 AM MityDSP (TI TMS320C6xxx Based Products) PCB Development: RE: MityDSP-Pro FPGA questions ...
- > In the directory labeled “C:\MityDSP\2.10\hardware\FPGA_boot” I see several sub directories that appear to have pre...
12/22/2011
- 11:53 AM MityDSP (TI TMS320C6xxx Based Products) PCB Development: RE: MityDSP-Pro FPGA questions ...
- (from Anthony)
Michael,
Thanks for the response. From what you describe it seems that the signals I intend to...
12/21/2011
- 07:16 PM MityDSP (TI TMS320C6xxx Based Products) PCB Development: RE: MityDSP-Pro FPGA questions ...
- Hi Tom / Anthony,
I hope this doesn't muddy the waters, but here is some more information: There are actually 3 E... - 01:01 PM MityDSP (TI TMS320C6xxx Based Products) PCB Development: RE: MityDSP-Pro FPGA questions ...
- ??From the schematics it appears that the evaluation board is connected to both RJ-45 connectors, one goes to the 10/...
- 11:04 AM MityDSP (TI TMS320C6xxx Based Products) PCB Development: RE: MityDSP-Pro FPGA questions ...
- Hello Tom,
I will try posting this to the support forum as well but I need to clear up some confusion Kevin and I ...
12/20/2011
- 12:11 PM ARM9 Based QNX Platforms Software Development: RE: SPI clock polarity
- It looks like the spi driver does not do anything with the SPI_MODE_CKPOL_HIGH flag you are trying to use.
I haven... - Question received outside of Redmine:
I am trying to interface a SPI device to the MightDSP board. The clock requ...
12/15/2011
- 02:35 PM MityDSP (TI TMS320C6xxx Based Products) PCB Development: RE: MityDSP-Pro FPGA questions ...
- The bootloader FPGA image included in the file mention provides a basic UART at pins 14 and 16 of the edge connector ...
12/14/2011
- (posted on behalf of a customer)
RS232_TXD SO-DIMM pin 14
RS232_RXD SO-DIMM pin 16
F...
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