Activity
From 08/23/2016 to 09/21/2016
09/21/2016
- MW 08:25 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Ethernet not coming up
- Just out of curiosity, have you tried a different cable? Do you have a switch or anything available to try?
Most PC's have 1Gb ethernet links, and I note your connection message indicated 100 Mbps. Wondering if you have a bad cabl... - MR 06:00 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Ethernet not coming up
- Well it's doing it again. No ethernet. Tried running the gpio test, didn't do anything. When I plug an ethernet cable in, the link light on the dev board's ethernet will give a really quick flash, also windows will recognize the connecti...
- AD 04:27 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Ethernet not coming up
- I'm not sure why it would fail like that, then recover without any real changes. The HPS_GPIO28 controls the Ethernet PHY Reset. If this was set low, the PHY would be held in reset. That being said, the boot log shows that this GPIO s...
- MR 12:56 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Ethernet not coming up
- I may have fixed it. On the prebuilt image there is the program gpiotest. I ran it just for the heck of it, and here's what I got...
root@mitysom-5csx:~# ./gpiotest
Usage: gpioprog PinFile
root@mitysom-5csx:~# stmmaceth ff702000.ether... - I turned the board on today with my custom SD image (FPGA, kernel, file structure...) that I have been using the past couple weeks, only to find the ethernet did not enable. I thought it must have been something with my image, so I loade...
09/19/2016
- HB 09:44 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Mity DSP L138F program
> from the starter guide when i type:
> ...
Have you solved this problem? Try with ' *root* ' for password.- JC 09:41 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Mity DSP L138F program
- Both of those ip addresses are on separate subnets. They will not be able to talk to each other. Do you have an IT person who would be able to help you get the networking setup correctly?
It would be helpful if you explained how you ... - NE 05:04 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Mity DSP L138F program
- Ok here is what i have:
1- the tera term response to ifconfig -a (teraterm_ip)
2- the virtual box terminal response (vb_ip)
which ip should i use"? - JC 09:37 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Problems with the first time configuration
- Thanks Hector, he was able to get the serial working by using the null modem cable.
- HB 09:12 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Problems with the first time configuration
- Hi Nourhan,
Did you check that your COM port is the correct one?,
after made the serial port configuration, did you make a reset to the card?
Your serial configuration looks good, I'm using the same configuration with a Null Modem ...
09/18/2016
- JC 07:08 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Mity DSP L138F program
- Nourhan Elsayed wrote:
> my dhcp derver is enabled (see attachment)
Alright let's revisit this question. Have you directly connected the devkit to your PC? If this is the case you may need to connect the virtual box to the right int... - JC 05:13 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Mity DSP L138F program
- You should be able to force it to check for an ip address by running @udhcpc -i eth0@. Or something similar I don't have one at home to test with.
- NE 05:13 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Mity DSP L138F program
- my dhcp derver is enabled (see attachment)
- NE 05:04 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Mity DSP L138F program
- isnt the dsp at eth0?
in this case i dont even have an IP address. - JC 04:55 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Mity DSP L138F program
- Have you connected your devkit straight to your PC? That ip address is usually assigned by windows if no dhcp server is found. http://www.techrepublic.com/forums/discussions/where-did-ip-16925451183-come-from/
For easiest setup it's ... - NE 04:51 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Mity DSP L138F program
- when i try to get the address of the l138 i get this (l138f_IP.PNG)
when i use 169.254.10.9 in the terminal i get this(terminal_fail.png) - JC 04:45 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Mity DSP L138F program
- The 192.168.1.125 address you are using is the address of the VM. You need to use the address for the L138.
- NE 04:43 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Mity DSP L138F program
- it doesnt work.
Please check the attachment capture.png
it doesnt ask for a username, only a password. i press enter it says permission denied.
attached is also the IP address info in the VM - JC 04:37 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Mity DSP L138F program
- Nourhan Elsayed wrote:
> from the starter guide when i type:
> ...
There is no root password set. If you login as user root and press enter when asked for password it should let you in. - NE 03:33 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Mity DSP L138F program
- from the starter guide when i type:
mitydspl138@vm$ scp ExampleProgram root@192.168.0.151:/tmp
it asks me for a password. i type "mitydsp" but i get access denied.
what am i doing wrong? i didnt set any password - NE 12:34 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Mity DSP L138F program
- it worked thank you!
the problem was the cable.
I am trying to get the address of the port and i run root@mityomap# ifconfig -a
i get the result in the attachment.
is this correct"?
which one is the address.
Also, you should provid... - MW 12:25 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Mity DSP L138F program
- Hi,
Usually our kits are provided with a cable. A couple kits require a NULL modem connection. Have you tried this cable?
-Mike
- NE 12:13 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Mity DSP L138F program
- also, I am connecting my board to tera term running on my windows with a serial to usb port.
I am getting nothing out of it though.
why? - Hello,
I'm starting up with the board and have been following the starter guide tutorial.
However I am stuck at "Boot the MityDSP-L138 up into linux.
"
how ??
Thanks,
- NE 11:47 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Problems with the first time configuration
- Hello,
I connected my device to the serial port and set the baude rate as attached (teraterm.png).
However, i get no response from the terminal. nothing shows up. why?
thanks.
09/08/2016
- SS 08:06 AM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: HDMI Output splash screen is intermittently displayed on boot
- Hi Dan,
Thanks for posting the instructions and looking at the higher resolution operation. This is very useful as it's possible we'll want to support a resolution that needs greater than 4MB for a framebuffer. We'll be using these ...
09/07/2016
- DV 06:21 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: HDMI Output splash screen is intermittently displayed on boot
- Alright, so I was able to get 1080p working. I had to make some changes to the defconfig for the hdmi example. I had to add support for CONFIG_CMA and CONFIG_DMA_CMA, which allowed the altera vip frame buffer driver to allocate enough co...
- DV 10:58 AM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: HDMI Output splash screen is intermittently displayed on boot
- That's a good idea Mike, it looks like the kernel defaults vram to 4MB but for this framebuffer 8MB+ is required. I'll try setting it higher and see if I can get 1080p working today.
Thanks,
Dan
09/06/2016
- MW 08:21 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: HDMI Output splash screen is intermittently displayed on boot
- Can you up the video ram buffer available for allocation using the kernel parameter of the format below?
- DV 06:29 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: HDMI Output splash screen is intermittently displayed on boot
- Alright my testing today wasn't as successful as I'd liked. I tried both 1920x1080 and 720x576. Doing 1920x1080 caused the kernel to crash when it tried to allocate the RAM for the frame buffer to use. 720x576 appeared to boot fine but m...
- DV 09:38 AM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: HDMI Output splash screen is intermittently displayed on boot
- Hi Steve,
I'm testing this now. Hopefully it's just the mods to the device tree/qsys project. I'll update once my build is finished and (fingers crossed) I'm able to get video.
Dan
09/02/2016
- SS 08:10 AM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: HDMI Output splash screen is intermittently displayed on boot
- Hi Daniel,
I saw the project got pushed, thanks.
When do you think you can put together those instructions for updating the resolution?
Thanks a lot,
Steve
08/30/2016
- RF 02:29 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Need Help for Audio MityDSP-L138F. DSP Platforms. No Linux Based
- Hi Bob,
thank you for your respond, hereby I attached my MCASP setup code, I modify the code from evmomapl138. And for schematic I used the schematic that provided by the critical link. I still got nothing from audio output, may be yo...
08/29/2016
- BD 11:27 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Need Help for Audio MityDSP-L138F. DSP Platforms. No Linux Based
- Hi Riyanto,
We don't have a ready-to-go example of setting up the DAC outside of Linux. It's difficult to troubleshoot your problem with the limited details provided.
If you are able to post your initialization/setup code here or...
08/26/2016
- Hello, I'm new using MityDSP, actually I'm moving from evmOMAPL138 to MityDSP.
I generate sine signal then want to play it through DSD1791 DAC so I can hear it. I already set the MCASP but there is no output sound.
I build the progra...
08/24/2016
- DV 09:59 AM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: HDMI Output splash screen is intermittently displayed on boot
- Hi Steve,
I'll cleanup and push the project today. I'll also go through and write down what needs to be updated in order to change resolution, I think it will be qsys, device tree, and maybe the initialization code for the HDMI chip b...
08/23/2016
- SS 03:52 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: HDMI Output splash screen is intermittently displayed on boot
- Hi Dan,
So I'm still not getting any output on my monitors. However, I tried adjusting the monitor settings and I get a message saying out of range signal. I don't understand how I saw the yocto splash screen on this monitor at some... - DV 02:18 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: HDMI Output splash screen is intermittently displayed on boot
- Sorry about that, it's attached now
- SS 01:41 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: HDMI Output splash screen is intermittently displayed on boot
- Can you post that image for me to try?
- DV 01:34 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: HDMI Output splash screen is intermittently displayed on boot
- Awesome, I'll glad it did work on the TV!
I was able to recreate what I think you're seeing on your monitor. If I set my monitor's image size to auto instead of wide then it only showed up as a black screen. When I set it to wide I wa... - SS 12:32 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: HDMI Output splash screen is intermittently displayed on boot
- Awesome, thanks.
I tried a large screen Samsung HDTV and your latest build works.
I'm hoping that the HDTV's are a bit more forgiving with the back porch value than the monitors, and this latest build works on both.
- DV 12:10 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: HDMI Output splash screen is intermittently displayed on boot
- Good catch, I'm doing a build now with the those back porch values. I'll let you know when it's finished.
- SS 12:00 PM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: HDMI Output splash screen is intermittently displayed on boot
- One thing of note, based on the original qsys file from the wiki page, it seems the back porch values are not the same as those used in the AD9889B programming guide for 720p-60. See attached screenshots. It may be that the display's I...
- SS 11:51 AM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: HDMI Output splash screen is intermittently displayed on boot
- No luck, same result, just a black screen.
- DV 11:14 AM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: HDMI Output splash screen is intermittently displayed on boot
- Hi Steve,
Attached is a new image. The only thing I changed was that I updated the output delays for the data/control lines to match what the microtronix's example project used. It did work in my dev kit.
Let me know how it goes
...