Mity CPU Platforms

07/01/2019

11:03 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: FPGA PIO interrupt issues with Rocko and kernel 4.9

Hi Wesley
Thank you for the proposed code change, that did the trick!
I think @static DRIVER_ATTR(fpga_uinput, S_IR... V J

06/28/2019

03:53 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: FPGA PIO interrupt issues with Rocko and kernel 4.9

Thanks for the log and module code.
We'd like to build this module in an attempt to recreate the issue, but the de... Wesley Dahar

10:04 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: FPGA PIO interrupt issues with Rocko and kernel 4.9

Hi Dan, thanks for your reply.
I did a quick test where I replaced the 4.9 (RT) zImage with 4.1.22(RT) on my rocko... V J

06/27/2019

08:21 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: FPGA PIO interrupt issues with Rocko and kernel 4.9

Hello,
We aren't aware of any changes or issues with the PIO interrupts. We haven't been able to recreate the issu... Daniel Vincelette

12:42 PM MitySOM-5CSX Altera Cyclone V Software Development: FPGA PIO interrupt issues with Rocko and kernel 4.9

Hi
After upgrading to Rocko and kernel 4.9 (RT) my pio interrupt routine is no longer working. My previous setup was... V J

06/26/2019

08:13 AM MitySOM-5CSX Altera Cyclone V Software Development: cannot boot a kernel with kexec

I use MitySOM-5CSX dev kit and i would like to boot to a different kernel using kexec.
In my configuration:
... aggelis aggelis

06/24/2019

04:38 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: uPP receive clock lower limitation in SDR (Single Data Rate mode)

Hi Vivek,
I believe the datasheet is saying that regardless of whether the clock is being used as DDR or SDR the ... Gregory Gluszek

06/21/2019

08:05 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: uPP receive clock lower limitation in SDR (Single Data Rate mode)

Hi,
I have a custom board with
-- MityDspl-138F module (with FPGA)
-- No Ethernet port
-- UART,USB,SD CARD int... Vivek Ponnani

06/12/2019

07:58 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: SPL over ethernet

Thank you, Jonathan, I appreciate the effort in any case.
I will be sure to share the link you have posted with my... Chris Dodic

06/06/2019

03:12 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: MityDSPL138

VIDYA J wrote:
> But in CCS they are asking initialization file for the processor.
When your building? Jonathan Cormier

03:10 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: MityDSPL138

But in CCS they are asking initialization file for the processor. VIDYA J

01:16 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: MityDSPL138

VIDYA J wrote:
> I used UART_echo code from OMAPL138_StarterWare_1_10_03_03 folder. For coding ARM i read like i nee... Jonathan Cormier

06:13 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: MityDSPL138

I used UART_echo code from OMAPL138_StarterWare_1_10_03_03 folder. For coding ARM i read like i need to add gel file.... VIDYA J

01:22 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: SPL over ethernet

I asked around and it does not look like we have an errata document for the devkit.
Note we do have a wiki page ... Jonathan Cormier

06/04/2019

01:47 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: MityDSPL138

VIDYA J wrote:
> For my project i want to do inter process communication on omapl138. Please reply for my below doub... Jonathan Cormier

07:16 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: MityDSPL138

For my project i want to do inter process communication on omapl138. Please reply for my below doubts
1. Is there Li... VIDYA J