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How to use the sdram for FPGA and EMIFA bus in MityDSP-Pro board?

Added by 锋 曲 over 8 years ago

Hello,
Our project needs a large mount of data transfer, so I want to know the assignment of pin for sdram of FPGA and the EMIFA address bus(i_emif_aea), I cann't find them in MityDSP-Pro.ucf. will you give me some FPGA demo for them. thank you.

Qu Feng()


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RE: How to use the sdram for FPGA and EMIFA bus in MityDSP-Pro board? - Added by Michael Williamson over 8 years ago

Hello Mr. Feng,

I am attaching the DDR MIG Test Bench that we originally used to validate the FPGA DDR connection. At a minimum, you should find the FPGA connections in the UCF contained within.

The MIG project for this is somewhat old (version 1.6). We have not had many customers actually use it, but we will support you as best as we can.

-Mike

DDR1.zip (592 KB) DDR1.zip MityDSP-PRO MIG reference project.
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