Activity
From 02/22/2013 to 03/23/2013
03/22/2013
- JT 03:13 PM Software Development: RE: Creating a Read-Only Filesystem
- I worked on it some more and ended up with a script with seven patch files that change it to a read-only filesystem. My plan is to setup a time delay relay that toggles the power to a board for a weekend test.
- MW 01:01 PM FPGA Development: RE: L138F - FPGA gets incorrect data from UPP
- Marek,
The UPP clocks may be sourced by either the FPGA or the OMAP-L138 based on your configuration requirements. If sourced by the OMAP-L138, you should be able to run the input clock to a DCM or a PLL and align the data-eyes on th... - Hello,
I have problem when trying to read data on UPP by FPGA (sent from OMAP - working with L138F, XC6SLX45, ISE WebPack 14.3). Data arrive corrupted. The reason might be latence on CLK when routed to clock tree via logic blocks in F...
03/20/2013
- JC 09:16 AM Software Development: RE: Creating a Read-Only Filesystem
- Jim,
Any luck? As far as I can tell that mount entry should work.
03/15/2013
- LM 11:32 AM Software Development: RE: MDK_2012-08-10 default configuration
- Mike,
Thanks for pointing that out - really helpful!
I can most definitely see the network (and boot from it) from U-Boot.
However, there is clearly some funny business going on with the PHY address;
U-Boot claims it finds the PHY a...
03/14/2013
- MW 08:25 PM Software Development: RE: MDK_2012-08-10 default configuration
- So the industrial IO board uses PHY address 3 and the EMAC driver is configured to look for that MDIO interface prior to initiating EMAC transfers. You will need to modify your kernel (make your own baseboard file or modify the industr...
- LM 07:06 PM Software Development: RE: MDK_2012-08-10 default configuration
- My custom board uses either PHY address 1 or 0 - both addresses cause the same problem.
I played around a little with the industrial base board and found that it does not suffer the same issue,
so there is most likely something in my ... - JT 08:59 AM Software Development: RE: Creating a Read-Only Filesystem
- I changed fstab for the /mnt/user_nand to as follows -
/dev/mtdblock1 /mnt/user_nand jffs2 defaults,rw,noatime,nodiratime 0 0
However, the power-up was the same and the partition was not mounted.
03/13/2013
- JC 04:06 PM Software Development: RE: Creating a Read-Only Filesystem
- > rm: cannot remove '/etc/volatile.cache': Read-only file system
> ...
Udev happens before the tmpfs entries get mounted from the fstab file. - JC 03:56 PM Software Development: RE: Creating a Read-Only Filesystem
- Your fstab entry doesn't have auto in the options list so it isn't auto mounted on startup. You should probably use the defaults and then override the options you want changed.
*defaults* Uses the default options that are rw, suid, d... - MF 01:20 PM Software Development: RE: SPI NOR Flash memory map
- This probably doesn't completely answer your question, but may be helpful. There is some "spare" memory on the SPI NOR flash.
On your target try: - MW 10:59 AM Software Development: RE: MDK_2012-08-10 default configuration
- What PHY address does your custom baseboard use?
-Mike
- Hi,
I am working on bringing up a custom base board for a MityDSP-L138.
Most things seem to work fine using the version of Linux installed on the MityDsp-L138 board out of the box. However, I need to reconfigure the kernel a bit to re...
03/12/2013
- LA 02:59 PM Software Development: RE: FPGA Memory Size
- You are correct we are looking at cs5 as well.
32k would probably be sufficient. We typically prefer to provide the information in a flat manner to offload the CPU from parsing, or having to copy out all the information instead of the... - JT 01:52 PM Software Development: RE: Creating a Read-Only Filesystem
- I had used -
mount -t jffs2 /dev/mtdblock1 /mnt/user_nand
and just -
mount /mnt/user_nand
also works.
- JC 01:42 PM Software Development: RE: Creating a Read-Only Filesystem
- "I can manually mount /mnt/user_nand and access that partition"
Whats the full command you use to manually mount your partition? Does @mount /mnt/user_nand@ work? - Hi,
We use the MityDSP-L138 in a factory automation product and need to prevent fs corruption from random shutdowns. My first attempt was to change the rootfs to read-only in a startup script, but it would be safer if the rootfs was rea... - JC 08:32 AM Software Development: RE: SPI NOR Flash memory map
- This appears to be what your looking for.
[[MityDSP-L138_Architecture]]
Also can be determined by looking at the uboot environment variables. The erase commands give the starting address and the max size expected for each image.
@
... - (posted for a customer)
We are looking at using the SPI flash and/or NOR flash for storing our software on the L138 SOM. We are currently using uBoot and the exisiting boot code on the board so we do not want to overwrite these.
...
03/11/2013
- MW 07:58 PM Software Development: RE: FPGA Memory Size
- As mentioned on the "EMIFA wiki page":http://support.criticallink.com/redmine/projects/arm9-platforms/wiki/EMIF_Interface, all of our FPGA fabric and drivers use CE5 space (0x66000000), for the ARM or the DSP (where did you find informat...
- The standard FPGA memory available to the arm processor within angstrom is currently limited to 2k.
From what we can gather there are many places that could work together to create this limit:
Flash code
uBoot
FPGA vhdl
Linux dr... - MC 12:49 PM FPGA Development: RE: SPI Core on FPGA: Implementation on MityDSP-L138F
- Dear all,
I'm trying to understand the behaviour of your SPI core on FPGA with hooked FIFO and wondering how to connect it to a PulSAR ADC (for example AD7980) from Analog Devices, hopefully, on SW side, using your tcDspFpgaSpi Class in...
03/06/2013
- MF 01:56 PM Software Development: RE: How to register hostname with DNS?
- I modified /etc/network/interfaces as described:
- JC 10:27 AM Software Development: RE: How to register hostname with DNS?
- http://www.turnkeylinux.org/forum/support/20090212/register-hostname-dns
This post suggests setting hostname in /etc/network/interfaces file.
03/05/2013
- MF 01:48 PM Software Development: RE: How to register hostname with DNS?
- The answer there was:
- JC 11:34 AM Software Development: RE: How to register hostname with DNS?
- This might be what your looking for.
http://www.linuxquestions.org/questions/linux-networking-3/dns-registration-on-internal-network-284556/ - I would like to use DHCP for ip address assignment, set my own hostname and register it with DNS.
So, far I can get an IP address just fine. I see that the hostname is in /etc/hostname (currently set to mityomapl138). Presumably I c... - MF 11:36 AM Software Development: RE: How to get system time?
- Stumbled across this:
#include <time.h> references /usr/local/oeore-i686/sysroots/armv5te-angstrom-linux-gnueabi/usr/include/time.h
which includes another file:
#include <bits/time.h>
which references
/usr/include/bits/time.h
...
02/27/2013
- JC 02:33 PM Software Development: RE: How to get system time?
- This stack overflow article seems to point to an eclipse bug and possible fix.
http://stackoverflow.com/questions/8881617/constants-not-loaded-by-compiler - JC 02:11 PM Software Development: RE: How to get system time?
- At least that file has the CLOCK_MONOTONIC in it but doesn't have clock_gettime...
- JC 01:56 PM Software Development: RE: How to get system time?
- Looks like you want linux/time.h located at /usr/local/oeore-i686/sysroots/armv5te-angstrom-linux-gnueabi/usr/include/linux/time.h
- MF 01:53 PM Software Development: RE: How to get system time?
- Where is the correct time.h file? There seem to be alot of them in various include directories.
#include <time.h>
if I right click then select "Open Declaration" it opens:
/usr/local/oeore-i686/sysroots/armv5te-angstrom-linux-gnue... - JC 01:21 PM Software Development: RE: How to get system time?
- And here is a discussion of CLOCK_REALTIME VS CLOCK_MONOTONIC.
http://stackoverflow.com/questions/3523442/difference-between-clock-realtime-and-clock-monotonic - DG 01:19 PM Software Development: RE: How to get system time?
- Not sure why it's not finding CLOCK_MONOTONIC, it's defined in time.h:
45 * The IDs of the various system clocks (for POSIX.1b interval timers):
46 */
47 #define CLOCK_REALTIME 0
48 #define CLOCK_MONOTONIC ... - MF 01:01 PM Software Development: RE: How to get system time?
- Thanks,
I added rt to the project Properties->C/C++ Build -> Settings -> Cross G++ Linker -> Libraries
I had already included time.h
It compiled if I set the first parameter of clock_gettime() to 0, but I still can't reference CLO... - DG 12:39 PM Software Development: RE: How to get system time?
- Hi Mary,
Be sure you are linking to the rt library which implements that call (as well as including the time.h header). Use -lrt as a linker argument to do this. - MW 12:34 PM Software Development: RE: How to get system time?
- Did you include <time.h> in your code?
- How do you get the system time in order to timestamp events?
Tried clock_gettime() but got a linker error: "undefined reference to `clock_gettime' "
There was also no reference for CLOCK_REALTIME, or CLOCK_MONOTONIC.
I would lik... - CO 08:01 AM FPGA Development: RE: I2C issues on SLX45
- Patched file is:
MDK/sw/ARM/linux/drivers/fpga/fpga_i2c.c
attached... - CO 07:56 AM FPGA Development: RE: I2C issues on SLX45
- Wow, this is a while ago. If I remember correctly the FPGA i2c driver functioned correctly after Mike's changes but, in my opinion, it was a little unoptimised. But that was for my specific app which wanted to push a lot of data across i...
- MC 06:40 AM FPGA Development: RE: I2C issues on SLX45
- Hello All,
Can you please tell me if your patch about I2C FPGA linux driver is available and working?
If yes, can you please provide a sort of explaination about the exact steps to apply it to the MDK_2012-08-10 release?
Have you su...
02/25/2013
- RT 10:00 AM FPGA Development: RE: Programming FPGA on power up.
- Got it sorted now, just noticed the loadaddr was incorrect
- RT 09:09 AM FPGA Development: RE: Programming FPGA on power up.
- Hi
I am running MityDSP Development kit Module L138-FI-225-RC.
-Rex - MW 09:05 AM FPGA Development: RE: Programming FPGA on power up.
- Not seeing anything obvious. For the load process, I believe you need to specify an image size larger than the filesize (need to doublecheck this for parallel loading, but I know is true for serial loading) as the configuration process ...
- Hello
We have been trying to save our .bin file to flash and load the FPGA on power up of our MityDSP.
Our board details are:-
U-Boot > factoryconfig
Factory Configuration:
Config Version : 1.1
MAC Address : 00:50:C2:E6:76:7...