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From 05/07/2014 to 06/05/2014

06/05/2014

06:28 PM Software Development: DSP HelloWorld
I'm trying to setup a development environment for the MityDSP-L138 to write DSP code.
I got the DSP HelloWorld tes...
Udi Fuchs
06:34 AM Software Development: Login uncorrect from serial connection and correct from ethernet connetion
Dear all,
I have a strange problem.
I hava my MityDSP connected to my pc through both a serial cable and a ethe...
Silvano Bertoldo
06:24 AM Software Development: RE: Kernel loading module problems MityDSP and FPGA configuration
I have corrected all the CRC error rounding the filesize parameters to the correct values.
I have also recompiled th...
Silvano Bertoldo

06/04/2014

08:57 AM Software Development: RE: Kernel loading module problems MityDSP and FPGA configuration
The filessize should be rounded to 0x800 bytes, which I think should be 0x150C800, not 0x150E000.
-Mike
Michael Williamson
08:49 AM Software Development: RE: Kernel loading module problems MityDSP and FPGA configuration
Dear all
As I got a lot of CRC errors, here are some question:
1 My .jffs2 file is about 21 MB (22070432 bytes) w...
Silvano Bertoldo

06/03/2014

08:48 AM Software Development: RE: Kernel loading module problems MityDSP and FPGA configuration
Dear Michael,
I tried to run the command you told me. Everything was ok until I copied the fpga_ctrl file on the t...
Silvano Bertoldo

06/01/2014

11:49 AM Software Development: RE: How to run bin application via u-boot?
> If I knew the answer to using a bin file beyond "go", as you asked before, I would have told you before. :^)
I'm S...
Ahmed Shaaban
10:19 AM Software Development: RE: How to run bin application via u-boot?
Hi Ahmed,
If I knew the answer to using a bin file beyond "go", as you asked before, I would have told you before....
Michael Williamson
04:39 AM Software Development: RE: How to run bin application via u-boot?
Hi Mike,
I have set the compiler option to "--symdebug:none" and the size of the .out file generated is also 3 MB.
...
Ahmed Shaaban

05/30/2014

11:02 AM Software Development: RE: Kernel loading module problems MityDSP and FPGA configuration
Did you also rebuild the FPGA drivers? They are not in-tree in the kernel git repository. They are located in the b... Michael Williamson
10:40 AM Software Development: RE: Kernel loading module problems MityDSP and FPGA configuration
Dear Michael,
let me know if my way of working is right:
1) I wrote my own baseboard-industrialio.c file as repor...
Silvano Bertoldo
07:30 AM Software Development: RE: Kernel loading module problems MityDSP and FPGA configuration
Hello,
We have many customers able to load and run modules with the MityDSP-L138, it's not obvious what the issue ...
Michael Williamson
04:00 AM Software Development: RE: Kernel loading module problems MityDSP and FPGA configuration
Dear all,
attached you can find a text (LinuxLoading.txt) file where I captured the entire boot together with the ...
Silvano Bertoldo
03:45 AM Software Development: RE: How to run bin application via u-boot?
Michael Williamson wrote:
> Just to confirm, you have the compiler option "--symdebug:none" in your release compile ...
Ahmed Shaaban

05/29/2014

04:29 PM Software Development: RE: How to run bin application via u-boot?
Ahmed,
I believe Mike was suggesting that you build the application as a "release" version without any debugging a...
Alexander Block
04:04 PM Software Development: RE: How to run bin application via u-boot?
Just to confirm, you have the compiler option "--symdebug:none" in your release compile and link options?
-Mike
Michael Williamson
03:51 PM Software Development: RE: How to run bin application via u-boot?
Hi Mike,
I have tried what you mentioned and it didn't work.
I'll wait your trial.
Thanks in advance.
Ahmed Shaaban
03:02 PM Software Development: RE: How to run bin application via u-boot?
I think you need to strip the .out file (make a release version that removes the debugging information).
If I get ...
Michael Williamson
01:48 PM Software Development: RE: How to run bin application via u-boot?
Posting some previous direct followup e-mails from the customer.
I have followed the steps of the Starterware wiki...
Alexander Block
10:47 AM Software Development: RE: Kernel loading module problems MityDSP and FPGA configuration
Hi,
Can you please capture the entire boot up on the console to a text file and set it over?
Or at least run "u...
Michael Williamson
10:38 AM Software Development: RE: Kernel loading module problems MityDSP and FPGA configuration
Dear Bob,
when I try to load the modules with "insmod fpga_ctrl.ko" I get an error with "Function non implemented"...
Silvano Bertoldo
09:30 AM Software Development: RE: Kernel loading module problems MityDSP and FPGA configuration
Hi Silvano,
Jon was referring to the kernel modules explicitly. The modules need to be installed in your target ro...
Bob Duke
08:47 AM Software Development: RE: Kernel loading module problems MityDSP and FPGA configuration
I report before that I recompile the kernel every time I made a modificatuon on the baseboard file.
In fact the link...
Silvano Bertoldo
08:24 AM Software Development: RE: Kernel loading module problems MityDSP and FPGA configuration
Its hard to tell from those error messages whats going on but have you tried recompiling the kernel modules when you ... Jonathan Cormier
07:38 AM Software Development: Kernel loading module problems MityDSP and FPGA configuration
Hello everybody.
I am Silvano Bertoldo, I mainly work on the software side of MityDSP and I have a big problem abo...
Silvano Bertoldo
09:53 AM Software Development: RE: Compiler does not run in VM
Also our vm does come with the toolchain installed. I'm unsure why you were unable to locate it.
Try looking in /u...
Jonathan Cormier
09:29 AM Software Development: RE: Compiler does not run in VM
Yes. You need to run the 32-bit version in the VM if your VM is a 32-bit architecture.
on your VM type "uname -a"....
Michael Williamson
09:26 AM Software Development: Compiler does not run in VM
Hello- I'm new to the MityDSP platform and I am having trouble getting the development environment working. I have i... Tom Tatakis

05/28/2014

09:04 AM Software Development: How to run bin application via u-boot?
Hi everyone,i have MityARM1808F.
I could use "bootelf" command[ex: bootelf 0xc0700000] to run any app.out,but the si...
Ahmed Shaaban
08:54 AM Software Development: RE: UPP ISR is not called
Finally i could solve this issue by adding the following code :
asm(" mrc p15, #0, r0, c1, c0, #0\n\t"
" ...
Ahmed Shaaban

05/19/2014

04:43 PM FPGA Development: RE: Programming FPGA Flash using IMPACT
Thanks Michael,
I shall follow the steps in the link you mentioned and let you know results.
Ahmed Shaaban

05/17/2014

12:45 PM Software Development: RE: DSP- EDMA Transmission problem
Hello again,
I am now trying to transmit data using upp interface. On the FPGA- side the interface works correctly, ...
Rafał Krawczyk

05/16/2014

05:55 PM Software Development: RE: EMIF Clock in U-Boot
Hello,
I assume you mean the EMIFA clock (to FPGA) not the EMIF clock (used for the DDR).
I am sorry I missed t...
Michael Williamson

05/15/2014

08:36 PM FPGA Development: RE: Programming FPGA Flash using IMPACT
Hi,
Please take a look at the [[Programming the FPGA]] wiki page for information about programming the FPGA.
Th...
Michael Williamson

05/14/2014

09:58 AM Software Development: UPP ISR is not called
Hi everyone,
I'am using CCS V5.3 and emulator XDS100V2.

I have developed SYS/BIOS ARM app. which use UPP to se...
Ahmed Shaaban

05/12/2014

11:44 AM PCB Development: RE: uPP Interface
I don't think that the UPP pins are pinmuxed (there is only one option if the UPP is used). See the MDK/sw/dsp/core/... Michael Williamson
09:16 AM PCB Development: RE: uPP Interface
Thanks Mike for reply.
The question will be, to what pins DSP connected pins FPGA? It needs to be known for purpos...
Oleh Mela
07:08 AM PCB Development: RE: uPP Interface
The UCF file in the board support package at MDK/fpga/vhdl/MityDSP_L138.ucf includes connection information between t... Michael Williamson
05:35 AM PCB Development: uPP Interface
Hi,
How to find out as are connected pins FPGA and DSP for the interface uPP?
Kind Regards,
Oleh
Oleh Mela

05/11/2014

01:03 PM FPGA Development: RE: UPP Sample Code needed
Thanks for you.That really helps. Ahmed Shaaban
01:02 PM FPGA Development: Programming FPGA Flash using IMPACT
Hello everyone, i have a MityARM-1808F with 256-Mb NAND Flash.
1 - I need to know the steps to Program FPGA Flash ...
Ahmed Shaaban

05/09/2014

10:24 AM Software Development: RE: DSP DMA crashes Linux
I have recently been working on a project where we ran into conflicts between QDMA's on the DSP side and MMC use on t... David Rice

05/08/2014

08:39 AM PCB Development: RE: 3D Step (STP) Files
Hi,
Please check this "wiki page":https://support.criticallink.com/redmine/projects/arm9-platforms/wiki/CAD_Files ...
Michael Williamson
08:37 AM PCB Development: 3D Step (STP) Files
Hi There,
Would it be possible to make available a 3D STP file of the MityDSP L138F
processor module for mechani...
Steven Bremner
 

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