Activity
From 10/26/2023 to 11/24/2023
11/21/2023
- MA 04:59 PM PCB Development: RE: Pin connection
- Hello Dan,
Thanks for providing this information and support. According to this datasheet, the FPGA module has an external oscillator. I was wondering if there is any way to enable the internal oscillators to be used because I tried ...
11/20/2023
- DV 06:30 PM PCB Development: RE: Pin connection
- Hello Mohammad,
Please take a look at our development board schematic, if you haven't already. It can be found here: https://support.criticallink.com/redmine/projects/5csxbase/wiki/Errata_and_Product_Change_Notifications. *80-000578RC...
11/17/2023
- MA 07:38 PM PCB Development: RE: Pin connection
- Thanks for your reply, Mike. I used Y13 as the clock pin in the development board and I wonder where internally in the layout of the development kit it is connected.
I want to remove just the FPGA module and use it alone in my project... - MW 07:30 PM PCB Development: RE: Pin connection
- Hi Mohammad,
If you open up the Datasheet and check Table 8 and search for Y13 you should that it is a direct connect to the EDGE connector (I believe pin 117, but you should double check).
There is no other connection.
With reg... - Hello,
I have a development kit of MitySOM-5csx (https://www.criticallink.com/product/mitysom-5csx-dev-kit/). I was wondering can anyone let me know where the Y13 pin of the FPGA module is connected internally in this board.
Thank...
11/16/2023
- AB 06:18 PM MitySOM-5CSX Embedded Vision Developer's Kit for Basler dart BCON Support: RE: Barrel jack type
- Marko,
The manufacturer part number used for the barrel jack is PJ-059BH. I have attached the manufacturer datasheet for your reference which has the dimensions you should need.
Alex - Hello,
I was wondering if you could help me find information on the specifications for the barrel plug, we need the size of the inner pin and the radius of the barrel. - Hello,
We have this module (https://www.criticallink.com/product/mitysom-5csx/ ) board on our project board and also I have this development kit with the same controller (https://www.criticallink.com/product/mitysom-5csx-dev-kit/).
...
11/02/2023
- DR 02:35 AM PCB Development: RE: MSEL[4] and return current cap...
- Sorry if I wasn't clear. The caps are optional. They might help in a worst case situation, but for most designs they are overkill. Leaving one off won't be a problem. If you are doing a design and have the option to put them on, it w...
11/01/2023
- AF 11:34 PM PCB Development: RE: MSEL[4] and return current cap...
- Hi David,
I understand that, but the eval board only has them on MSEL[3:0] and does not have one on MSEL[4]. So, should there be one on MSEL[4] on any design using the MitySOM or not?
Thanks,
Austin - DR 07:38 PM PCB Development: RE: MSEL[4] and return current cap...
- The intention of the caps to ground on these signals is to allow some high frequency ground currents from the SOM I/O's going off-SOM to have additional paths to ground, since the MSEL signals (and other listed signals) are essentially D...
10/28/2023
- The dev board has MSEL[3:0] with 1000pF caps, and MSEL[4] does not have a cap, unless I missed it. In the design guide:
7.4 Return Currents
The module’s edge connector has GND connections distributed along the interface pinout to ma...
10/27/2023
- DV 06:10 PM FPGA Development: RE: Link missing on System Design Overview wiki page
- Thank you for bringing this to our attention, I've updated the text on that wiki page so it now links to our reference project.
Dan
10/26/2023
- SA 08:00 PM Software Development: RE: How to boot FPGA from U-Boot without having the uboot.env file in my SD card
- Hi everyone,
For anyone who is reading, I have figured it out and I hope this will help you.
The U-Boot is running a script, see the bootcmd below - (posted on behalf of a customer)
on this URL:
https://support.criticallink.com/redmine/projects/mityarm-5cs/wiki/System_Design_Overview
it says:
"Create a new project or start from the Critical Link MityARM-5CSX reference pro...