Activity
From 05/02/2025 to 05/31/2025
05/30/2025
- 02:57 PM MitySOM-AM57X Software Development: RE: Configuring and editing the pinmux settings for AM57(F) dev kit through dts files.
- Thejas Raj wrote in message#6973:
> Hi,
> Thank you for your reply.
>
> And can you give me the path to the u-bo... - 05:55 AM MitySOM-AM57X Software Development: RE: Configuring and editing the pinmux settings for AM57(F) dev kit through dts files.
- Hi,
Thank you for your reply.
And can you give me the path to the u-boot device tree in the yocto environment. Th... - 06:40 AM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Enquiry about mcu_safety_error pin
- Hi Mike,
Thank you for your response.
We are working with the SDL (Safety Diagnostic Library), and as part of t...
05/29/2025
- 02:00 PM MitySOM-AM57X Software Development: RE: Configuring and editing the pinmux settings for AM57(F) dev kit through dts files.
- Note if you are developing a custom board, we'd be happy to do a schematic/layout review as well. Those can be email...
- 01:57 PM MitySOM-AM57X Software Development: RE: Configuring and editing the pinmux settings for AM57(F) dev kit through dts files.
- Unfortunately TI's guidance at least for SDK 6, is that the majority of pinmuxing must be done in u-boot while the IO...
- Hi,
We have a yocto source built following the arm development wiki and a working base image.
We are trying to... - 09:23 AM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Enquiry about mcu_safety_error pin
- Hello,
The MCU_ERRORn signal is not connected to the PMIC. It is pulled low on the board via a 4.7K resistor.
... - Hello there,
Question 1. For the MitySOM AM62A, is the pin MCU_SAFETY_ERRORn connected to the PMIC ?
Question ...
05/26/2025
- 02:35 PM MitySOM-5CSX Altera Cyclone V PCB Development: RE: Displayport
- Thank you very much for your quick answer ! Your schematic is very clear, it's exactly what I was looking for; I'll a...
- 10:47 AM MitySOM-AM57X Software Development: RE: Programming FPGA through JTAG and High speed data transfer support
- Hi Shankar,
It is a US holiday today, I will add some documentation for programming via JTAG (at least a wiki page... - Hello everyone,
We are currently working on a project using the MitySOM-AM57X development board, and we would appr...
05/23/2025
- 04:23 PM MitySOM-5CSX Altera Cyclone V PCB Development: RE: Displayport
- Hello,
We have driven a displayport output from a MitySOM-5CSX transceiver group.
For proof of concept we had d... - 01:59 PM MitySOM-AM57X FPGA Development: RE: MitySOM-AM57F communicating to FPGA via PCIe
- Thanks mike for the quick response. I will look through these examples
- 01:45 PM MitySOM-AM57X FPGA Development: RE: MitySOM-AM57F communicating to FPGA via PCIe
- See link below for the FPGA example projects which include PCIe.
https://support.criticallink.com/redmine/projects... - We are using MitySOM-AM57(F) Development Kit for our development. Are there any examples provided to read and right t...
05/22/2025
- We are planning to use the high speed transceivers for a displayport output, but we're not sure of voltage compatibil...
05/20/2025
- 05:29 AM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Enable DDR ECC in Am62A processor
- Hi Jonathan,
Thank you for your support. It's clear now, and I see that they have provided the DDR ECC driver code...
05/19/2025
- 03:29 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Enable DDR ECC in Am62A processor
- Rajkumar Dumala wrote in message#6956:
> Hi Jonathan,
>
> Thank you for the response.
>
> I applied the three ...
05/18/2025
- 06:47 PM MitySOM-AM57X PCB Development: RE: I/O voltage levels
- Hi Michael,
I would like to thank you for the continued support and prompt assistance you have extended to us....
05/16/2025
- 06:33 AM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Enable DDR ECC in Am62A processor
- Hi Jonathan,
Thank you for the response.
I applied the three patches you provided to my current workspace, rebu...
05/14/2025
- 08:34 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Enable DDR ECC in Am62A processor
- Attached 2 patches for u-boot and 1 patch for the kernel.
Most of these changes you and Mike have already talked a... - 02:20 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Enable DDR ECC in Am62A processor
- Thanks Rajkumar, I agree. I'll look into it today.
- 04:22 AM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Enable DDR ECC in Am62A processor
- Hi Jonathan,
Thank you for the clarification.
From what I understand, the DDR setup code dynamically detects th...
05/13/2025
- 09:25 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Debian SDK Not booting in am62p (Am62x dev kit)
- Rajkumar Dumala wrote in message#6940:
> Hi Mike,
>
> I was on leave for the past four days, so I wasn't able to ... - 09:29 AM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Debian SDK Not booting in am62p (Am62x dev kit)
- Hi Rajkumar,
It's not clear why there would be a difference between the two. It's the same processor / frequency ... - 07:28 AM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Debian SDK Not booting in am62p (Am62x dev kit)
- Hi Mike,
I was on leave for the past four days, so I wasn't able to communicate.
When we tested on the TI EVM, ... - 04:48 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Enable DDR ECC in Am62A processor
- Sorry guys. Ecc doesn't work with the current u-boot code.
The issue is my ddr setup code which dynamically sets u... - 02:21 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Enable DDR ECC in Am62A processor
- Hi Raj,
Does it work on the TI EVM? The reason I ask is that the EVM has 8 GB of memory. I just want to make sur... - 02:01 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Enable DDR ECC in Am62A processor
- Hi Mike,
I don't understand why it's not working, even though all the reserved regions seem to be within the valid... - 12:11 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Enable DDR ECC in Am62A processor
- Hi Rajkumar,
From this link:
https://support.criticallink.com/redmine/projects/mitysom_am62x/wiki/Enabling_DDRS... - 10:42 AM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Enable DDR ECC in Am62A processor
- Hello,
It was my mistake—I shared the wrong screenshot earlier. You can find the correct one attached with this me... - 10:38 AM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Enable DDR ECC in Am62A processor
- Hello Mike,
I reduced the CMA size to 512 MiB; however, the issue remains the same.I am providing the image for yo... - 09:37 AM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Enable DDR ECC in Am62A processor
- Well. Sorry it only goes up to 0xF0000000. But that still may be too high.
- 09:36 AM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Enable DDR ECC in Am62A processor
- Hello,
When you enable ECC in LPDDR4, you reduce the maximum amount of addressable memory available to the device.... - 07:49 AM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Enable DDR ECC in Am62A processor
- Just to add to the above point:
In the boot log, it shows that ECC is enabled, and I am able to run some test case... - Hello there,
We are using the MitySOM-AM62x Devkit with the AM62A System on Module (SoM), which includes 4 GB of L...
05/12/2025
- 01:37 PM MitySOM-AM57X PCB Development: RE: I/O voltage levels
- Hi Shankar,
Take a look at our PCIE / DMA example on our git server:
https://support.criticallink.com/gitweb/?p... - 12:25 PM MitySOM-AM57X PCB Development: RE: I/O voltage levels
- Hi Michael,
Thank you for your response.
We are initiating FPGA development on the MitySOM-AM57X development bo...
05/07/2025
- 02:55 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Debian SDK Not booting in am62p (Am62x dev kit)
- Note we are not super familiar with ROS but from my quick googling, sending messages around 1kHz does seem like its a...
- 02:21 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Debian SDK Not booting in am62p (Am62x dev kit)
- Rajkumar, Note I added pre tags around your code dumps. You have been using the @ symbols but that only works for si...
- 10:06 AM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Debian SDK Not booting in am62p (Am62x dev kit)
- When you run the example on the TI EVM (with SDK 10.1 + RT config), do you see 1000 Hz performance or the same 600 Hz...
- 05:46 AM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Debian SDK Not booting in am62p (Am62x dev kit)
- Hi Mike,
We have pulled the Ubuntu-based Docker container on top of the MitySOM SDK 10.01.
We built the kernel us...
05/05/2025
- 12:12 PM MitySOM-AM57X PCB Development: RE: I/O voltage levels
- The SOM ties the following AM57x voltage IO domains to 1.8V. You will need to use level shifters on your board to ge...
- 12:01 PM MitySOM-AM57X PCB Development: RE: I/O voltage levels
- Hello Mike,
Thank you for your swift and helpful response.
We are planning to use I2C3, I2C4, and I2C5 ... - 11:41 AM MitySOM-AM57X PCB Development: RE: I/O voltage levels
- Hello,
You should use level shifters to shift up to 3.3V. Do not pull the I2C pins directly to 3.3V or modify t... - In the data sheet of MITY-SOM_AM57F SOM board page 4, it is mentioned that the AM57XX MFIOs are operating at 1.8V lev...
05/02/2025
- 01:06 PM MitySOM-AM62, MitySOM-AM62A, & MitySOM-AM62P Software Development: RE: Debian SDK Not booting in am62p (Am62x dev kit)
- Hi Mike,
The U-Boot build is working fine. I haven't tried the SD card image you mentioned yet, but I will try it an...
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