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From 07/21/2011 to 08/19/2011

08/19/2011

01:40 PM Software Development: RE: Transfer files to card from PC via usb ? instead of ethernet ?
You will need to rebuild the kernel (and install it on your system) such that it supports USB mass storage devices an... Michael Williamson
01:33 PM Software Development: RE: Transfer files to card from PC via usb ? instead of ethernet ?
Thank you very much for the information. After using USB 1.1 port as host port, connecting a USB flash drive, I have ... Thomas Nagel
07:29 AM Software Development: RE: Transfer files to card from PC via usb ? instead of ethernet ?
USB support for the OMAP-L138 is fully described in the User Guides provided by the TI on it's "OMAP-L138 Processor":... Michael Williamson

08/18/2011

03:33 PM Software Development: RE: Transfer files to card from PC via usb ? instead of ethernet ?
Hi,
USB stick is not connected. It is a USB cable only.
The configuration is like this :
UART to USB via FT23...
Thomas Nagel
02:46 PM Software Development: RE: Transfer files to card from PC via usb ? instead of ethernet ?
Can you provide a reference schematic to your baseboard?
Do you have a USB memory stick connected to one of the tw...
Michael Williamson
02:16 PM Software Development: Transfer files to card from PC via usb ? instead of ethernet ?
Hi,
I have two USB cables connected to baseboard.
Using one, I am able to connect to console and login root@mit...
Thomas Nagel

08/17/2011

06:33 PM Software Development: RE: MityDSP GUI
Thanks for the reply. Sorry for the confusion.
We have our own baseboard with mitydsp connected to it. Using UART t...
Thomas Nagel
12:53 PM Software Development: RE: MityDSP GUI
Hi Thomas,
I'm a little confused. The MItyDSP-L138 card is a "system on module (SOM) or computer on module (COM) ...
Michael Williamson
12:41 PM Software Development: RE: MityDSP GUI
Hi Mike, Thanks for the reply. We do not have the baseboard. Only the mitydsp-l138 card. Can we still communicate wit... Thomas Nagel
07:33 AM Software Development: RE: MityDSP GUI
The Industrial I/O card (the MityDSP-L138 development kit baseboard) should have come with a 10 pin ribbon to DB-9 co... Michael Williamson

08/15/2011

05:08 PM Software Development: RE: MityDSP GUI
Yes, we have OMAPL138 product. Is there a user interface that works with this card ?
We are trying to use UART inter...
Thomas Nagel
05:02 PM Software Development: RE: MityDSP GUI
Hi Thomas -
The MityDSP GUI is used only with our 6711 and 6455 based product. I believe you have an OMAPL138 or ...
Thomas Catalino
04:58 PM Software Development: MityDSP GUI
Hi,
Is the MityDSP GUI , part of hardware shipment ? or do we have to buy it separately ? Can I download it from cri...
Thomas Nagel
02:43 PM Software Development: RE: Eclipse CDT Builder problem when set up for cross compile
Fred,
There's a good chance that your bashrc file is no being read when you start it from the launcher. I don't reme...
Tim Iskander
02:35 PM Software Development: RE: Eclipse CDT Builder problem when set up for cross compile
The angstrom environment-setup script is run at the end of my .bashrc file.
Running Eclipse from a shell known to ...
Fred Weiser
01:50 PM Software Development: RE: Eclipse CDT Builder problem when set up for cross compile
Hi Fred,
Where are you running the angstrom environment-setup script? We typically add this to the end of our bash...
Gregory Gluszek
01:36 PM Software Development: Eclipse CDT Builder problem when set up for cross compile
Hi.
I am getting the following error when attempting to build a project in Eclipse. I am not using CL's VM - my Ec...
Fred Weiser

08/12/2011

07:07 AM FPGA Development: RE: 372 MHz
Hi Rob,
In general, running at different EMIFA bus rates should be OK as long as you keep in mind the following po...
Michael Williamson

08/11/2011

06:23 PM Software Development: RE: git connection
Thomas
We were having some issues with our server earlier today. It should be all better now.
cheers
/Tim
Tim Iskander
05:23 PM Software Development: git connection
Hi,
How are you doing ?
I was following the steps listed here:
http://support.criticallink.com/redmine/projects/a...
Thomas Nagel
04:51 PM FPGA Development: 372 MHz
Hello,
I am running my L138 CPU at 372 MHz, which results in the EMIFA bus running at 93MHz instead of 100 MHZ.
...
Rob Gillis

08/09/2011

03:38 PM Software Development: RE: Using the EMIFA to read/write FPGA registers
It worked! I changed to 0x40 and used 16 bit numbers. Here's the new code that worked-
UInt32 *Fpga_mem_ptr = (un...
Marc Lichtman
02:30 PM Software Development: RE: Using the EMIFA to read/write FPGA registers
Well, OK.
If you are using our framework with the base module, the address at offset zero corresponds to a read on...
Michael Williamson
02:09 PM Software Development: RE: Using the EMIFA to read/write FPGA registers
I tried to use the following code to write and read from a register. I used both CS4 and CS5 (0x64000000 and 0x660000... Marc Lichtman
12:19 PM Software Development: RE: Using the EMIFA to read/write FPGA registers
Well the wiki says CS5 is used for the DSP, but when I look at the VHDL it says CS4. Marc Lichtman
12:15 PM Software Development: RE: Using the EMIFA to read/write FPGA registers
Marc,
Are you using CS4 or CS5?
0x66000000 corresponds to CS5.
-Mike
Michael Williamson
12:04 PM Software Development: RE: Using the EMIFA to read/write FPGA registers
So does the EMIFA just run in the background and constantly refresh the values? Or does it perform an action when yo... Marc Lichtman
11:55 AM Software Development: RE: Using the EMIFA to read/write FPGA registers
Hi Marc,
The FPGA registers are memory mapped starting at DSP address 0x66000000. The registers for each additiona...
Gregory Gluszek
11:39 AM Software Development: Using the EMIFA to read/write FPGA registers
Hey All,
I am trying to access the FPGA registers using the EMIFA, but I am having trouble finding documentation e...
Marc Lichtman
03:36 PM Software Development: RE: continual reboot
@sfh_OMAP-L138 -erase -p COM7@ worked!! Craig Meyers
03:00 PM Software Development: RE: continual reboot
Should. You'll need to reflash again the u-Boot and UBL. Give it a try. (good catch, BTW).
-Mike
Michael Williamson
02:49 PM Software Development: RE: continual reboot
Would this work?
sfh_OMAP-L138 -erase
help sez:
Global erase of the flash memory device (no input files)
Craig Meyers
02:46 PM Software Development: RE: continual reboot
Argh. The SPI reprogramming doesn't wipe the u-Boot environment or the FPGA environment, so it just picks back up wh... Michael Williamson
02:41 PM Software Development: RE: continual reboot
Control-C does not work. Tried in both HyperTerminal and Putty.
Also tried dead board instructions with seemingly ...
Craig Meyers
02:33 PM Software Development: RE: continual reboot
Try hitting control-C continuously while booting. If that does not work, you can use the "programming a dead board" ... Michael Williamson
02:17 PM Software Development: continual reboot
Hi,
I modified the FPGA code and during the write the board rebooted.
I had bootfpga set to load the fpga automat...
Craig Meyers

08/08/2011

10:59 AM Software Development: RE: Mounting USB Flash Memory (mitydspl138)
Hi Fred,
Most likely the *USB Mass Storage support* option is not selected in the config for the kernel you're usi...
Gregory Gluszek

08/05/2011

05:26 PM Software Development: Mounting USB Flash Memory (mitydspl138)
I have the mitydspl138, baseboard, and the standard Critical Link Linux kernel. When I plug a usb flash drive into th... Fred Weiser

08/03/2011

10:17 AM FPGA Development: RE: Programming the FPGA
The pwm.ngc should be included in the 2011-08-01 MDK release (just published).
-Mike
Michael Williamson
09:41 AM FPGA Development: RE: Programming the FPGA
I successfully built this project but I had to comment out anything related to pwm. Seems I do not have the pwm.ngc n... Craig Meyers

07/29/2011

11:37 AM FPGA Development: RE: Programming the FPGA
Thanks Mike. I picked up the common VHDL files with no trouble.
However, when I tried to add a netlist file (.ngc?...
Craig Meyers
07:30 AM FPGA Development: RE: Programming the FPGA
Hi Craig,
Yeah, the Xilinx ISE file format really doesn't use relative path names very well.
As far as the VHDL...
Michael Williamson

07/27/2011

05:28 PM Software Development: RE: NAND controller, EDMA3 and EMIFA priorities
Hi Mads,
I'm not sure there is much more you can do than what is already configured.
You might consider cross p...
Michael Williamson
05:15 PM Software Development: NAND controller, EDMA3 and EMIFA priorities
Hi
I have a few questions regarding the NAND flash and EMIFA.
From the EDMA priority settings below (which I ju...
Mads Lind Christiansen
05:05 PM Software Development: RE: Mapping code to IRAM
Hi Mark
You could try the #pragma CODE_SECTION(<function name>, "mysect") (In C++ you omit the function name and p...
Mads Lind Christiansen

07/26/2011

05:14 PM Software Development: RE: Mapping code to IRAM
Hi Marc -
I'm not sure we will have the answer to this question as it's really a TI question. While we're waiting...
Thomas Catalino
04:56 PM Software Development: Mapping code to IRAM
Hey All,
I am using CCS4 and SYS/BIOS to program the DSP core in the L138, and I am trying to figure out how to sp...
Marc Lichtman
09:43 AM FPGA Development: RE: Programming the FPGA
I opened this project file in XISE and it yelled at me for a number of VHD files (see attached png).
example.zip -...
Craig Meyers

07/24/2011

08:44 PM FPGA Development: RE: Programming the FPGA
Success has been achieved. Thanks Mike!
I loaded the stock uImage from the .run file supplied with the kit. That d...
Craig Meyers
12:55 PM FPGA Development: RE: Programming the FPGA
Hi Craig,
I think you need to modify the bootargs assuming the NAND has a valid filesystem on it.
See "this wik...
Michael Williamson
09:45 AM FPGA Development: RE: Programming the FPGA
The uImage_Indio_20110723 kernel image booted but could not mount to a filesystem.
Getting closer!
I attached t...
Craig Meyers

07/23/2011

12:52 PM FPGA Development: RE: Programming the FPGA
Thanks Mike.
My plan is to also extract the image from the .run file and try both this afternoon.
I am using th...
Craig Meyers
11:40 AM FPGA Development: RE: Programming the FPGA
Hi Craig,
I am attaching a uImage file built for the Industrial I/O board from our kernel code baseline.
This r...
Michael Williamson
10:57 AM FPGA Development: RE: Programming the FPGA
Hey Mike,
Late yesterday I booted into UBOOT; cleared the bootfpga (setenv bootfpga;saveenv); rebooted with Angstr...
Craig Meyers
09:04 AM FPGA Development: RE: Programming the FPGA
Hi Craig,
Just following up. Are you still DOA? Or did not programming the FPGA clear the issue?
-Mike
Michael Williamson

07/22/2011

01:24 PM FPGA Development: RE: Programming the FPGA
Good point. I'll defer any FPGA programming until I resolve the linux kernel load.
Here's the boot text. You can s...
Craig Meyers
01:14 PM FPGA Development: RE: Programming the FPGA
Also,
Can you dump the entire boot text from power up to hang? Would like to see all the commands executed by the...
Michael Williamson
01:13 PM FPGA Development: RE: Programming the FPGA
Hi Craig,
Are you programming the FPGA before you load the kernel? The FPGA can cause problems with the kernel lo...
Michael Williamson
01:06 PM FPGA Development: RE: Programming the FPGA
I tried again in case I screwed up the first time.
I also tried the uImage file in /boot on another of our boards....
Craig Meyers

07/21/2011

05:00 PM FPGA Development: RE: Programming the FPGA
Hi Greg,
Thanks for XISE files.
I followed instructions from Linux Kernel installtion using uImage from files a...
Craig Meyers
02:03 PM FPGA Development: RE: Programming the FPGA
Hi Craig,
I've attached the project file used to build the .bin file I posted earlier. You'll need to link against...
Gregory Gluszek
02:02 PM FPGA Development: RE: Programming the FPGA
The revised read instruction works!
We have the L138-FI-225-RC. My mistake. I was looking at the wrong line in the...
Craig Meyers
01:43 PM FPGA Development: RE: Programming the FPGA
Hi Craig,
For the bootgpga image, you need to read out all of the image into RAM before trying to program the FPGA...
Michael Williamson
01:03 PM FPGA Development: RE: Programming the FPGA
Question on automatically loading the FPGA at boot...
I've followed these instructions:
loadb 0xC0700000
[send...
Craig Meyers
12:21 PM FPGA Development: RE: Programming the FPGA
Can you guys zip up and post or e-mail me source files used to generate this .bin?
I would like to play some with ...
Craig Meyers
11:09 AM FPGA Development: RE: Programming the FPGA
Hi Tim.
I'm on my 3rd USB-to-serial adapter and 4th attempt at driver update. I'm sure some manager got a nice bon...
Craig Meyers
10:15 AM FPGA Development: RE: Programming the FPGA
Hi Tim,
Do I need a different version of SPIWriter_MityDSP-L138.out? Didn't see this file in the latest zip.
I ...
Craig Meyers
09:07 AM FPGA Development: RE: Programming the FPGA
Craig
I have uploaded the latest serial programming utility to the files section.
Try that and see if it corrects ...
Tim Iskander
08:22 AM FPGA Development: RE: Programming the FPGA
I've tried several other usb to serial adaptors with no luck.
I get the same error:
(AIS Parse): Performing Opco...
Craig Meyers
 

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