Activity
From 10/08/2013 to 11/06/2013
11/05/2013
- BD 10:37 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: How to launch application on startup
- MF 09:55 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: How to launch application on startup
- So, from the command line:
- MW 07:05 AM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: uPP receive issues
- Yes, this is the issue. The pin-muxed OMAP-L138 net that includes the UPP_CHB_CLOCK is not connected to a GCLK pin. We didn't have the routing resources (or the clock pins) to connect every possible clock pin on the OMAP-L138 to a GCLK...
- MT 06:18 AM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: uPP receive issues
- I have resolve that problems. Maybe I was wrong to select uPP clock sources (PLL1_SYSCLK2).
But, when my FPGA sytem is bigger. I have an other bugs when mapping the logic.
Place:1108 - A clock IOB / BUFGMUX clock component pair hav...
11/04/2013
- BD 01:09 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: How to launch application on startup
- Mary,
When you exit a shell, all processes connected to the shell are typically terminated. When you execute a script, the shell used to run the script terminates at the end. Your application is probably being terminated prematurely.... - JC 12:54 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: How to launch application on startup
- Do you happen to know if your system is using systemd for starting processes?
You can check to see if the following directory exists: /etc/systemd/
If you have a filesystem that uses systemd then reading the following may be helpfu... - JC 12:48 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: How to launch application on startup
- You can run the command "ps | grep myApplication" and look for your process in order to tell if its running.
Also normally you would redirect output from the console to a log file for your application, something like:
/home/root/He... - JC 12:44 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: How to launch application on startup
- Mary,
I think you have a typo here:
./home/root/HelloWorldDSP/Debug/myApplication myArgument &
There shouldn't be a period at the beginning of the line. - Could you provide an example of how to start an application on startup. I get that you can run it from a script in init.d which is referenced in rc5.d. My problem is that if I start it in the background (even from a shell command) it s...
11/03/2013
- Hi,
When debugging a program that is running on the MityDSP-PRO C6455, I get the following in the workspace error log upon a restart:
Warning
Mon Nov 04 12:06:09 EST 2013
Unable to locate file: C:\jenkins\workspace\MityDSP-6711-M...
10/30/2013
- JC 11:44 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Ethernet RMII2 working in u-boot, but not kernel
- Dan,
I noticed while working on your board that you are using debian as your root filesystem. Could you point me to where you got the base filesystem? Or any pointers on getting this to work?
I've found a helpful tutorial for the ...
10/29/2013
- DM 04:05 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Ethernet RMII2 working in u-boot, but not kernel
- thanks for the support great job. yes fstab need to be fixed along with omap-i2c timeout.
- JC 03:50 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Ethernet RMII2 working in u-boot, but not kernel
- Also this is unrelated but your /etc/fstab file was corrupted on the sd card you sent to us and was throwing a few errors on boot.
- JC 03:36 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Ethernet RMII2 working in u-boot, but not kernel
- Dan,
I found the issue. There was a pin in conflict. The mmc2_wl12xx_init() was using one of the pins your rmii pin mux was using.
I've attached the original patch with my typo fixed. And a patch that disables some extra periph... - JC 02:17 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Ethernet RMII2 working in u-boot, but not kernel
- Interesting, I tried fixing my typo and it breaks ethernet....
- DM 01:55 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Ethernet RMII2 working in u-boot, but not kernel
- thanks work great, but two questions:
1) why is the rmii2 pin mux being called from the baseboard_setup_can()?
2) baseboard_setup_enet is calling rgmii2 pin mux config?
i'm commented out the code in baseboard_setup_enet and inser... - JC 11:55 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Ethernet RMII2 working in u-boot, but not kernel
- I'm fairly certain the only difference with my patch is it doesn't mess up all the whitespace and so should cleanly apply to the branch.
- JC 11:51 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Ethernet RMII2 working in u-boot, but not kernel
- Here is my version of your patch which was applied to the head of the mityarm-linux-v3.2 branch.
EDIT:
Attached again with proper extension. - JC 11:48 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Ethernet RMII2 working in u-boot, but not kernel
- I based it off the mityarm-linux-v3.2 branch but also tested it using the cl_v3.2_AM335XPSP_04.06.00.07 tag that you mentioned and got the same results. I would highly recommend using the mityarm-linux-v3.2 branch though as there have b...
- DM 11:47 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Ethernet RMII2 working in u-boot, but not kernel
- the error index are expected, no i/o (sign) attach
- DM 11:45 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Ethernet RMII2 working in u-boot, but not kernel
- which git tag do you use?
- JC 11:43 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Ethernet RMII2 working in u-boot, but not kernel
- I brought it up with
# ifconfig eth0 up
# dhclient eth0
and then _scp_'d the kernel uImage file - DM 11:41 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Ethernet RMII2 working in u-boot, but not kernel
- great, how did you test the ethernet?
- JC 11:39 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Ethernet RMII2 working in u-boot, but not kernel
- Dan,
I compiled the 3.2 kernel for your board. The networking seems to be working for me (see below). Also the usb_test didn't break but it is reporting some errors. Did you see this when you tried it? - DM 09:12 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Ethernet RMII2 working in u-boot, but not kernel
- the only change was the usb cdc device. attach is our .config file
- MW 09:09 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Ethernet RMII2 working in u-boot, but not kernel
- I would recommend that you guys sync up on your .config files for the kernel builds as well.
-Mike
- DM 09:06 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Ethernet RMII2 working in u-boot, but not kernel
- ok we are know on the same page. let me see what i can come up with.
- JC 09:04 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Ethernet RMII2 working in u-boot, but not kernel
- Yes, but you had suggested I test this on our devkit which we don't have such a pic.
- DM 09:03 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Ethernet RMII2 working in u-boot, but not kernel
- on the board is a pic that is connected to /dev/ttyACM0
- JC 09:01 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Ethernet RMII2 working in u-boot, but not kernel
- What I meant was that we don't have a physical usb device that identifies itself as /dev/ttyACM0.
- DM 08:59 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Ethernet RMII2 working in u-boot, but not kernel
- in the config menu
- DM 08:59 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Ethernet RMII2 working in u-boot, but not kernel
- when you build the kernel add a usb cdc acm device.
- JC 08:54 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Ethernet RMII2 working in u-boot, but not kernel
- Dan, I don't have a /dev/ttyACM0 device. The only one i have is attached to your board. I'm currently trying to get the kernel to boot on your board. Your patch from above doesn't apply cleanly to the AM335XPSP_04.06.00.02 branch.
- DM 08:52 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Ethernet RMII2 working in u-boot, but not kernel
- you can test this by running the usb_test /dev/ttyACM0
- JC 08:25 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Ethernet RMII2 working in u-boot, but not kernel
- I had meant that I pulled the patch from the 3.2 branch into the 3.1 branch where you already had ethernet working. How can I test this on our mityarm baseboard? I don't have a cdc device to plug in.
10/28/2013
- DM 07:35 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Ethernet RMII2 working in u-boot, but not kernel
- i ran the patch on your mityarm board. I found the usb to be unstable, ethernet works.
- DM 06:19 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Ethernet RMII2 working in u-boot, but not kernel
- what does this patch address? in the 3.2 kernel the usb works great. the rmii2 ethernet is the problem.
- DM 06:12 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Ethernet RMII2 working in u-boot, but not kernel
- downloading now, the wait on /dev/mmcblk.... is do to the gpio.cd and gpio.wp should be set to -EINVAL.
- JC 05:24 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Ethernet RMII2 working in u-boot, but not kernel
- Dan,
I found a patch on the 3.2 branch that may solve the problem your having. I pushed it to a new branch on our git "usb_fix_test". I tried to compile and test it on the board you gave us but it wouldn't get past "Waiting for root... - DM 03:36 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Ethernet RMII2 working in u-boot, but not kernel
- background:
usb_test runs all day on 3.2 kernel with git tag:cl_v3.2_AM335XPSP_04.06.00.07
on AM335XPSP_04.06.00.02 the following error occurs.(see below)
source code for usb_test is in the ~/board_test/usb_test.c
gcc usb_test.c -o... - BD 02:56 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Ethernet RMII2 working in u-boot, but not kernel
- Dan,
Can you provide specific details on what you are doing to create the usb_test program and what device you have connected to /dev/ttyACM0? How are you determining USB is unstable?
Thanks,
-Bob
- DM 01:47 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Ethernet RMII2 working in u-boot, but not kernel
- yes the udev update and script does restart the usb2 port. thanks for the patch.
usb is still unstable running ~/usb_test /dev/ttyACM0 test code.
~/usb_test is stable under cl_v3.2_AM335XPSP_04.06.00.07
just a note the hokey-pokey.sh ... - JC 10:25 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Ethernet RMII2 working in u-boot, but not kernel
- Dan,
We found a bug in our reference filesystem. I created a wiki page on it. Could you please apply the changes it describes and let us know if it solves your problem.
http://support.criticallink.com/redmine/projects/armc8-platform...
10/25/2013
- SH 06:15 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Can't get DMA using low level driver working on DSP
- Thanks for the replies. I'm using the 0x66000000 (CS5) space.
However, I was wrong about the interpretation of the hi-res clock in DSP/BIOS - each count is one CPU clock cycle, so the transfer rate is closer to 170ns per 16-bit word. ... - DR 08:46 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Can't get DMA using low level driver working on DSP
- If you have cache enabled for the DDR, I don't think it should be much faster to use IRAM. Your DMA in this case will complete when the data is in cache, not when it is in DDR.
Transfers from the EMIF interface are not very efficient... - MW 07:45 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Can't get DMA using low level driver working on DSP
- The crossbar to the EMIF is not great. Which CS space are you using for your transfer? The number of wait states changes with chip select space.
Transferring to IRAM may help you, as I believe the DMA will transfer from EMIFA to CPU... - JC 01:37 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Ethernet RMII2 working in u-boot, but not kernel
- Are you applying your patch on top of these checkouts?
- DM 01:21 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Ethernet RMII2 working in u-boot, but not kernel
- the usb port is stable on tag cl_v3.2_AM335XPSP_04.06.00.07
but Ethernet will not work. usb is unstable on tip AM335XPSP_04.06.00.02 branch, but Ethernet will work.
Any ideas? - DM 10:27 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Ethernet RMII2 working in u-boot, but not kernel
- still a problem with usb on this branch.
- AB 10:23 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Ethernet RMII2 working in u-boot, but not kernel
- Could you post an updated patch to show what was changed to resolve the issue?
Thank you. - DM 10:04 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Ethernet RMII2 working in u-boot, but not kernel
- thank you for the support
- DM 10:01 AM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Ethernet RMII2 working in u-boot, but not kernel
- commented out some of the pin mux structs and now Ethernet is working.
- MW 08:10 AM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: uPP receive issues
- Do you know which two byes you are missing? Are they consistently the same two bytes?
Do you have a chipscope license?
10/24/2013
- SH 08:10 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Can't get DMA using low level driver working on DSP
- I hope somebody is still monitoring this thread - I have DMA working now using buffers on the FPGA, but the transfers seem to be pretty slow. I am transferring 228 16 bit words from the FPGA buffers (so over the EMIF). I am using the h...
- DM 01:22 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Ethernet RMII2 working in u-boot, but not kernel
- we are not using flash
- JC 01:15 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Ethernet RMII2 working in u-boot, but not kernel
- Also do you plan on using the nand? You have a module that has the larger 512MB nand which requires the latest u-boot and kernel image to work (See the CONFIG_NAND_MITYARM_LARGE_PAGE_SUPPORT option for the kernel and the mityarm335x_4kp...
- DM 01:14 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Ethernet RMII2 working in u-boot, but not kernel
- new patch file using format-patch --ignore-space-change
- JC 01:08 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Ethernet RMII2 working in u-boot, but not kernel
- I'm having a hard time finding the actual change in the patch. If you could recreate your patch ignoring white space change that would be much appreciated.
- JC 01:03 PM MitySOM-335x (ARM Cortex-A8 Based Products) Software Development: RE: Ethernet RMII2 working in u-boot, but not kernel
- FYI, the kernel has very strict rules about formatting. In this case the use of tabs instead of spaces. Most of your patch is converting tabs to spaces which is a big no no for kernel code.
https://www.kernel.org/doc/Documentation/Cod... - problem description:
no eth0 data begin transmitted on tx0 or tx1 lines, running with rmii2 configuration.
mac_control loopback not working.
ifconfig stats for eth0: showing tx counter incrementing, all other counters are zero.
*... - SH 10:54 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: SYS/BIOS and SYSLINK
- Hi Mike:
Here is another example of why I think the move to SYS/BIOS is necessary - check out this post:
http://e2e.ti.com/support/development_tools/code_composer_studio/f/81/p/3205/116267.aspx
note the key phrase - "RTDX no lon...
10/23/2013
- MT 08:25 AM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: uPP receive issues
- I have updated my source code
This is my *.ucf file
NET "o_upp_2xtxclk" LOC = "F4" | IOSTANDARD = LVCMOS18;
NET "io_upp_chb_clock" LOC = "T1" | IOSTANDARD = LVCMOS18;
NET "io_upp_chb_start" LOC = "T2" | IOSTANDARD = LVCMOS18 | PU... - Hi,
I am using Upp to transfer data between FPGA and OMAP.
The data send from FPGA to OMAP is OK. But FPGA can not receive exactly data from OMAP.
FPGA has missed 2 byte from OMAP.
in FPGA design, i have used clock from OMAP to recei...
10/22/2013
- JC 11:42 AM MitySOM-335x (ARM Cortex-A8 Based Products) PCB Development: RE: VBACKUP Current Draw
- Mark,
This change has been added to u-boot. The following branches have the fix:
* AM335XPSP_04.06.00.03
http://support.criticallink.com/gitweb/?p=u-boot-mityarm-335x.git;a=commit;h=359dcc2dc57a10c0e495c8f352cd0812d1db8171
* AM3...
10/19/2013
- PS 10:38 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: UPP acquisition issue
- hi Greg,
Thanks a million for all the help, solved the issue finally. I did set the dma thread priority to 15 but that didn't help. Finally enabled STARTA and used it as a handshake signal between UPP and ADC, rather than using extern...
10/18/2013
- GG 02:09 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: UPP acquisition issue
- Hi Preejith,
First, in relation to the thread priority, 15 is the maximum priority for a task and 1 is the lowest. I think the confusion comes from that fact the priority for the DMA engine itself ranges from 0-7, with zero being the... - PS 10:12 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: UPP acquisition issue
- hi Greg,
We tried both your suggestions but without success. First about the DMA thread priority, we tried setting it to 15 but it didn’t change anything. According to what i understand from the dsp/bios manual it seems 0 is the highe... - RB 12:10 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Design examples
- Right. After a little digging I figured out that QSYS does the heavy lifting of
configuring the protocol glue logic to implement their various standard interfaces
like avalon and then creates a top level hdl file with the appropriate ... - BD 10:35 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: Design examples
- I'm glad you're over the hurdle, Rich. We don't have a formal tutorial yet, other than the sample project included with the virtual machine image.
This sample FPGA project (and associated directory structure) is located here:
~/proj... - DV 10:20 AM MitySOM-5CSX Altera Cyclone V Software Development: RE: Moving rbf file from host to dev-board
- Hi Rich,
You'll need to SCP the RBF over, I'm pretty sure FTP wasn't enabled by default. But I believe you will need to set a root password on your board in order to SCP files to it.
To set a root password use the passwd command on... - MF 08:18 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: File transfer methods
- I did not try a ftp transfer. We have decided to do the transfer within our application, by connecting to a socket and just sending the file data through. I would expect to get performance something like netcat.
Mary
10/17/2013
- I have created a new rbf file with some custom logic added which I built using QSYS,
and converted from SOF format to RBF format as required.
I attempted to use an ftp client (Filezilla) to move the rbf file to the dev board
and the c... - RB 06:26 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Design examples
- Ok, I was able to build a system with a new component that I created in QSYS
and added some custom VHDL logic to for testing purposes. So I think I'm
over the hurdle. - JC 04:07 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: File transfer methods
- Mary what do you get from the ftp server?
- GG 02:07 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: UPP acquisition issue
- Hi Preejith,
In the code you attached the Channel A and Channel B DMA thread priorities are set to 9. These can be set to a much higher priority (TSK_MAXPRI = 15 is the max). That might help.
One question I have is whether you ar... - We have an application where a 14 bit ADC is wired to the UPP port via the FPGA. The application needs to perform triggered acquisition and process the data acquired. Acquisition via UPP is initiated via a hardware interrupt which happen...
10/16/2013
- Are there any tutorials on implementing custom logic on the Cyclone V FPGA
and then joining it with one of the interface standards so that it can be used
in QSYS to integrate the new design to work in conjunction with the HPS system?
... - RB 05:43 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: sudo on xubuntu
- Thanks Bob,
That did the trick.
I have another question, but I'll start another thread for it.
- BD 05:17 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: sudo on xubuntu
- Hi Rich, please try the password "user" when using sudo.
-Bob
- I need to gain access to administrator level via sudo on the xubuntu release
that was issued with my MityARM-5CSX dev kit to add a shared folder to the
environment. What is the password for sudo, etc.
Thanks - MF 09:48 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: File transfer methods
- I tried some tests as you suggested.
file size = 64 Mbytes
scp: 60 sec (using WinSCP)
sftp: 53 sec (using WinSCP)
tftp: 6 min (using TFTPServer)
netcat: 20 sec (Linux host)
I also tried compressing with gzip, but after ...
10/14/2013
- JC 02:51 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: File transfer methods
- Note that all of my experiments have been on a mitydsp copying from nand and not sata.
- JC 02:49 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: File transfer methods
- I built the latest busybox using instructions provided and ran the ftpd service as described below and got a transfer rate close to 6MB/s.
I copied the new busybox executable to the /home/root folder and ran it from there for the belo... - MW 02:28 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: File transfer methods
- TFTP is not very efficient depending on how it is configured.
- MW 02:27 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: File transfer methods
- It might be easier to export the mitydsp filesystem via NFS or SAMBA and have windows access it directly.
Or have the mitydsp mount a windows share via SAMBA and do a copy.
You should be able to get 7 or 8 MB/sec transfer speeds,... - JC 02:23 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: File transfer methods
- I was able to transfer a 6MB file in about 13 seconds which is about 472 kB/s.
And the same transfer done over scp took about 6 seconds and reported an average speed of 1.0MB/s. - JC 02:14 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: File transfer methods
- I switched to using the http://tftpd32.jounin.net/ program as the tftp server as I was unable to get the other one to give me enough data to determine transfer speed. This program is much simpler and will display the transfer speed of t...
- JC 02:06 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: File transfer methods
- My guess is that windows firewall is blocking the connection. You should be able to google how to allow an inbound connection through the firewall on port 69 for your specific version of windows.
-Jonathan - MF 01:58 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: File transfer methods
- Trying the Solar Winds tftp server. Installed it, ran it.
On my target:
root@mityomap:/mnt/sata# tftp -p -l testfile 192.168.1.82
tftp: timeout
root@mityomap:/mnt/sata# tftp -p -r testfile 192.168.1.82
tftp: timeout
Also t... - BD 01:53 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: File transfer methods
- Mary,
The angstrom distribution we use for our baseline does not include a TFTP server in its package repository.
If the TFTP speed meets your requirements, you will need to compile busybox and enable support for TFTPD.
Some t... - JC 01:25 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: File transfer methods
- It is possible. But i would test the other direction first to see if you get the speeds your looking for.
-Jonathan - MF 01:24 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: File transfer methods
- The Windows PC would be requesting the file. So, I think we want the som to be the server. Is this possible?
Mary - JC 01:16 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: File transfer methods
- Mary,
There should be a tftp dameon package available for this platform.
Which device will be triggering this transfer? Meaning is the Windows computer going to be the server and the som the client or visa versa.
If you want... - What is the most efficient file transfer method that this distro supports? We expect to generate very large files (up to 1 GB) on a SATA drive. A host PC (Windows) will need to transfer the files from the target to the host over a netw...
10/11/2013
- ZL 11:30 AM MityDSP-L138 (ARM9 Based Platforms) PCB Development: RE: MityDSP-L138F LVDS lengths? .... (posted on behalf of a customer)
- Hi Angela,
The following traces' length are reported from our tool.
Let us know if you need anything else. Thank you.
Net Name Trace Length (mil)
IO_7_N 892.248
IO_7_P 942.683
IO_9_N 859.358
IO_9_P 883.568 ... - TI 07:45 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: IndustrialIO board with Mity-DSP-L138F, No ETH PHY detected
- One thing that sticks out..
you flashed the kernel to 0x100000 instead of 0x10000 (which is where you erased).
which could explain the no magic # issue.
If the phy detection issue is limited to the SOM and you said there was an elec... - I am using an IndustrialIO Rev 2B board with a Mity-DSP-L138FI-236-RL SOM in which uboot reports:
Resetting ethernet phy
Net: No ETH PHY detected!!!
When investigated using "mii device", no names are listed. I think this indicat...
10/10/2013
- My company is using your MityDSP-L138F SoM in a research prototype. The design has a high speed LVDS bus to the Spartan-6. We need to design LVDS bus with an off module clock input connecting to the FPGA O-SERDES2. To clculate the cloc...
- MW 07:38 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: EMIFA write timing
- Hi Steven,
Using a separate chip select (and adjusting the wait timings setup in u-Boot) should make this feasible, but I can't really help much further with a detailed implementation.
If you are not using any of CL's provided core... - SH 12:52 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: EMIFA write timing
- To read the THS1206 I need two chip selects, which can be the core cs and an address bit. Then I need a read pulse which is enclosed within the chip selects and long enough that the THS1206 has time to drive the data bus so the EMIFA ca...
10/09/2013
- MW 01:36 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: EMIFA write timing
- Do you mean for the EMIFA from the OMAP-L138 or the signals from the EMIFA_iface.vhd module that CL provides?
I don't have one drawn up, but you do have the source code for the EMIFA_iface.vhd (if that is what you are after) that you ... - Is there a diagram for the EMIFA write timing like the one in the wiki for read timing? I am having some problems implementing an interface to a THS1206 ADC using RD and WR - for the read, it looks like RD goes high after everything is ...
10/08/2013
- SC 06:04 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: UPP "start" signal ignored in receive mode?
- FYI, for anyone reading this in the future:
The root of the problem was that the FPGA was sending longer or shorter packets than the UPP hardware was configured for. The START signal does actually work once everything is configured c... - DR 04:12 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Can't get DMA using low level driver working on DSP
- You bring up a very good point. If you are only moving 16 words every 4us, the overhead to setup the DMA may be too much to make it worth doing that.
Do you have a latency requirement (i.e., how may microseconds from the time the dat... - SH 04:09 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Can't get DMA using low level driver working on DSP
- By the way, David and Mike, thanks for the information on the cache functions. When I insert them into my example, I see that the data has indeed been transferred by DMA. Too bad I didn't do this a couple of days ago...
- SH 03:52 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Can't get DMA using low level driver working on DSP
- Thanks, David for all that information - as you can tell I am not very experienced in DSP programming. I hope you won't mind if I ask you a related question. The reason for wanting to use DMA in the first place is that I must read 8 wor...
- DR 03:19 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Can't get DMA using low level driver working on DSP
- The QDMA can be used for just about anything the EDMA can be used for, in terms of transfers, but it can't be triggered by an external event -- it is software triggered. What this means is that you have to have an interrupt handler to r...
- SH 01:30 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Can't get DMA using low level driver working on DSP
- First to David Rice: This test was just meant to get me started - ultimately I want to transfer 16 bit words from external memory (via EMIFA mapped through the FPGA) from an ADC to internal memory for processing. So that once I got the ...
- MW 01:20 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Can't get DMA using low level driver working on DSP
- Hello Steven,
Is it possible that you need to invalidate your cache prior to validating the transfer has completed? I am looking at your code and I do not see any invalidation. Are you disabling CACHE via the MAR registers or BIOS s... - DR 01:01 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: Can't get DMA using low level driver working on DSP
- Hi Steven,
I looked briefly at your code and nothing jumped out at me...
I am the one who developed Critical Link's QDMA class for use on this module, although it was a couple of years ago. I do remember that it was a very painful... - I desperately need some help here. I have been trying for 3 days to get DMA working on the DSP. I have attached a CCSv5.5 project that I have been working with – it couldn’t be much simpler, just a memory to memory transfer using the e...