Mity CPU Platforms

12/11/2014

07:50 PM MitySOM-5CSX Altera Cyclone V FPGA Development: 100MHz Input clock (CLK2 - DDR3) Issue

A customer has the 100MHz DDR3 clock being fed into the module through Pins 117 and 119 on a custom carrier board and... Alexander Block

12/09/2014

06:06 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: DSP/BIOS issue MityDSP-L138

Hi,
Why at programming port UART-1 under a DSP/BIOS (from DSP side) in reply to sending of a binary file on the hy... Oleh Mela

12/08/2014

04:58 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: mtd->read() returned ECC error

You may have better luck with the latest MDK. MDK_2014-01-13 is the newest.
Download release_2014-01-13.run fro... Jonathan Cormier

04:52 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: mtd->read() returned ECC error

MDK_2011-03-31
Chris Coonan

04:51 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: mtd->read() returned ECC error

Which MDK version? Jonathan Cormier

04:48 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: mtd->read() returned ECC error

I am using the mityomap-full.jffs2 supplied with the MDK. I "assumed" the filesize was the number of bytes transferre... Chris Coonan

04:44 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: mtd->read() returned ECC error

Chris,
Your flash commands seem reasonable though it is unusual that your file happens to already be exactly 0x800... Jonathan Cormier

03:56 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: mtd->read() returned ECC error

I know this issue was addressed earlier in this forum. I followed the instructions given regarding the need to use th... Chris Coonan

11/25/2014

07:46 AM MitySOM-5CSX Altera Cyclone V FPGA Development: RE: Writing to HPS memory

I would recommend contacting your Arrow FAE or Altera for help with the device tree generation / sopcinfo file.
Yo... Michael Williamson

07:39 AM MitySOM-5CSX Altera Cyclone V FPGA Development: Writing to HPS memory

Hi,
I'm want to use the hps_ddr_write_example design from critical link and test it on Arrow Terasic Cyclone V SOC... Vidya Govindan

11/24/2014

09:23 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: inotify issue

This is a non-problem. It is working fine. Sorry for the trouble. Chris Coonan

09:12 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: inotify issue

Could you provide some example code that shows the problem you are having? Also need a better explanation of what pro... Jonathan Cormier

07:31 AM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: inotify issue

My mistake. Cut and paste error. The kernel is 2.6.34-RC1.
Chris Coonan

11/22/2014

12:09 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: inotify issue

Trying to get inotify to execute properly from inside my application code. I am using linux kernel 2.24-RC1.
Are t... Chris Coonan

11/17/2014

05:16 PM MityDSP-L138 (ARM9 Based Platforms) Software Development: RE: FPGA configuration via u-Boot problem

You can also use the promgen command to generate a bin file from a bit:
promgen -w -p bin -u 0 filename.bit -o fil... Gregory Gluszek

02:35 PM MitySOM-5CSX Altera Cyclone V Software Development: RE: Kernel Driver

Hi
I compiled the kernel driver with the Linux kernel in the instruction here (https://support.criticallink.com/re... Anonymous

07:29 AM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: RE: PlanAhead issue

For ISE (and I think ISE / PlanAhead are still the tools for Spartan 6, as the Vivado tools are for 7 series and high... Michael Williamson

03:21 AM MityDSP-L138 (ARM9 Based Platforms) FPGA Development: PlanAhead issue

Hi,
Why at creation of the project in PlanAhead 14.7 for the chip xc6slx45csg324-3 it is not possible to specify Tem... Oleh Mela